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Intel D925XHY D925XHY Technical Product Specification - Page 35

Power Management

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Product Description 1.10.3 Fan Monitoring Fan monitoring can be implemented using Intel® Desktop Utilities, LANDesk* software, or thirdparty software. The level of monitoring and control is dependent on the hardware monitoring ASIC used with the Desktop Board. For information about The functions of the fan connectors Refer to Section 1.11.2.2, page 39 1.10.4 Chassis Intrusion and Detection The board supports a chassis security feature that detects if the chassis cover is removed. The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion connector. When the chassis cover is removed, the mechanical switch is in the closed position. 1.11 Power Management Power management is implemented at several levels, including: • Software support through Advanced Configuration and Power Interface (ACPI) • Hardware support: ⎯ Power connector ⎯ Fan connectors ⎯ LAN wake capabilities ⎯ Instantly Available PC technology ⎯ Resume on Ring ⎯ Wake from USB ⎯ Wake from PS/2 devices ⎯ Power Management Event signal (PME#) wake-up support ⎯ PCI Express WAKE# signal support 35

Section	Page
Intel® Desktop Board D925XHY Technical Product Specification	1
Revision History / Disclaimer	2
Preface	3
Intended Audience	3
What This Document Contains	3
Typographical Conventions	3
Other Common Notation	4
Contents	5
1 Product Description	9
1.1 Overview	10
1.1.1 Feature Summary	10
1.1.2 Board Layout	12
1.1.3 Block Diagram	14
1.2 Online Support	15
1.3 Processor	15
1.4 System Memory	16
1.4.1 Memory Configurations	17
1.5 Intel® 925X Chipset	21
1.5.1 USB	21
1.5.2 IDE Support	21
1.5.3 Real-Time Clock, CMOS SRAM, and Battery	24
1.6 PCI Express* Connectors	28
1.7 Legacy I/O Controller	28
1.7.1 Serial Port	28
1.7.2 Parallel Port	29
1.7.3 Diskette Drive Controller	29
1.7.4 Keyboard and Mouse Interface	29
1.8 Audio Subsystem	30
1.8.1 Audio Subsystem Software	30
1.8.2 Audio Connectors	30
1.8.3 8-Channel (7.1) Audio Subsystem	30
1.9 LAN Subsystem	32
1.9.1 Marvell* Yukon* 88E8036 PCI Express 10/100 Ethernet Controller	32
1.9.2 RJ-45 LAN Connector with Integrated LEDs	32
1.9.3 LAN Subsystem Software	32
1.10 Hardware Management Subsystem	33
1.10.1 Hardware Monitoring and Fan Control ASIC	33
1.10.2 Thermal Monitoring	34
1.10.3 Fan Monitoring	35
1.10.4 Chassis Intrusion and Detection	35
1.11 Power Management	35
1.11.1 ACPI	36
1.11.2 Hardware Support	38
2 Technical Reference	43
2.1 Introduction	43
2.2 Memory Resources	43
2.2.1 Addressable Memory	43
2.2.2 Memory Map	45
2.3 DMA Channels	45
2.4 Fixed I/O Map	46
2.5 PCI Configuration Space Map	47
2.6 Interrupts	48
2.7 PCI Conventional Interrupt Routing Map	49
2.8 Connectors	50
2.8.1 Back Panel Connectors	50
2.8.2 Component-side Connectors	52
2.9 Jumper Block	61
2.10 Mechanical Considerations	62
2.10.1 Form Factor	62
2.10.2 I/O Shield	63
2.11 Electrical Considerations	64
2.11.1 DC Loading	64
2.11.2 Add-in Board Considerations	64
2.11.3 Fan Connector Current Capability	65
2.11.4 Power Supply Considerations	65
2.12 Thermal Considerations	66
2.13 Reliability	68
2.14 Environmental	69
2.15 Regulatory Compliance	70
2.15.1 Safety Regulations	70
2.15.2 European Union Declaration of Conformity Statement	70
2.15.3 Product Ecology Statements	72
2.15.4 EMC Regulations	74
2.15.5 Product Certification Markings (Board Level)	76
3 Overview of BIOS Features	77
3.1 Introduction	77
3.2 BIOS Flash Memory Organization	78
3.3 Resource Configuration	78
3.3.1 PCI Autoconfiguration	78
3.3.2 PCI IDE Support	78
3.4 System Management BIOS (SMBIOS)	79
3.5 Legacy USB Support	79
3.6 BIOS Updates	80
3.6.1 Language Support	80
3.6.2 Custom Splash Screen	80
3.7 Boot Options	81
3.7.1 CD-ROM Boot	81
3.7.2 Network Boot	81
3.7.3 Booting Without Attached Devices	81
3.7.4 Changing the Default Boot Device During POST	81
3.8 Fast Booting Systems with Intel® Rapid BIOS Boot	82
3.8.1 Peripheral Selection and Configuration	82
3.8.2 Intel Rapid BIOS Boot	82
3.9 BIOS Security Features	83
4 Error Messages and Beep Codes	85
4.1 BIOS Error Messages	85
4.2 Port 80h POST Codes	87
4.3 Bus Initialization Checkpoints	91
4.4 Speaker	92