ViewSonic VP150M Service Manual - Page 16

Theory, Circuit, Operation

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ViewSonic September 2000 - Version 1.0 THEORY OF CIRCUIT OPERATION Service Manual VP150m VP150m is a dual input, multi-frequency and multi mode color TFT LCD display. It supports different resolutions including XGA, SVGA, VGA and other various high resolution modes up to 1024x768 for IBM, PC compatibles, Power PC and Macintosh. VP150m uses a TFT LCD panel with a 0.297mm pixel pitch, providing 16.7 million color images. As the previous block diagram illustrates, VP150m uses the Analog/Digital Interface Controller (IC02) ASIC for mode detection and resolution scaling from its preset values. The digital input uses Sil151 (IC11) to extract TMDS link. The purpose of the two PLL's is to provide the clock from multiple horizontal synchronous frequencies. The ICS1531 (IC01) includes PLL1 and ND converter's sample clock. PLL2 produces the LCD panel's pixel clock with the TLC2933 (IC03). Each TFT LCD display uses the 24C08 (IC24) chip to provide DDC2BTM with Analog Plug&Play and 24C02 (IC14) for digital interface Plug&Play. The DDC data format is EDID v1.3. Upon receiving video signal input, the Analog Interface Controller (Digital Process and Control System) will trigger the mode detection function such that the internal controls can use the ROM preset information to drive the Analog Interface Controller. In addition, the preset values can determine A/D converter clock; LCD pixel clock; line buffer input/output rate; V-Sync and H-Sync pulse width; and back porch and front porch to provide optimal performance for the TFT LCD displays. Digital process and control system allows users to control OSD menu values to change display settings that include auto contrast, auto sync, contrast, brightness, color adjust, HN position and H size. The following sections are a breakdown of the TFT LCD display control boards: Confidential - Do Not Copy Page 15

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ViewSonic
September
2000
-
Version
1.0
Service
Manual
VP150m
THEORY
OF
CIRCUIT
OPERATION
VP150m
is
a
dual
input,
multi
-frequency
and
multi
mode
color
TFT
LCD
display.
It
supports
different
resolutions
including
XGA,
SVGA,
VGA
and
other
various
high
resolution
modes
up
to
1024x768
for
IBM,
PC
compatibles,
Power
PC
and
Macintosh.
VP150m
uses
a
TFT
LCD
panel
with
a
0.297mm
pixel
pitch,
providing
16.7
million
color
images.
As
the
previous
block
diagram
illustrates,
VP150m
uses
the
Analog/Digital
Interface
Controller
(IC02)
ASIC
for
mode
detection
and
resolution
scaling
from
its
preset
values.
The
digital
input
uses
Sil151
(IC11)
to
extract
TMDS
link.
The
purpose
of
the
two
PLL's
is
to
provide
the
clock
from
multiple
horizontal
synchronous
frequencies.
The
ICS1531
(IC01)
includes
PLL1
and
ND
converter's
sample
clock.
PLL2
produces
the
LCD
panel's
pixel
clock
with
the
TLC2933
(IC03).
Each
TFT
LCD
display
uses
the
24C08
(IC24)
chip
to
provide
DDC2BTM
with
Analog
Plug&Play
and
24C02
(IC14)
for
digital
interface
Plug&Play.
The
DDC
data
format
is
EDID
v1.3.
Upon
receiving
video
signal
input,
the
Analog
Interface
Controller
(Digital
Process
and
Control
System)
will
trigger
the
mode
detection
function
such
that
the
internal
controls
can
use
the
ROM
preset
information
to
drive
the
Analog
Interface
Controller.
In
addition,
the
preset
values
can
determine
A/D
converter
clock;
LCD
pixel
clock;
line
buffer
input/output
rate;
V
-Sync
and
H
-Sync
pulse
width;
and
back
porch
and
front
porch
to
provide
optimal
performance
for
the
TFT
LCD
displays.
Digital
process
and
control
system
allows
users
to
control
OSD
menu
values
to
change
display
settings
that
include
auto
contrast,
auto
sync,
contrast,
brightness,
color
adjust,
HN
position
and
H
size.
The
following
sections
are
a
breakdown
of
the
TFT
LCD
display
control
boards:
Confidential
—
Do
Not
Copy
Page
15