ViewSonic VP150M Service Manual - Page 18

September, Version, VP150m, Confidential

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ViewSonic September 2000 - Version 1.0 THEORY OF CIRCUIT OPERATION W 09 O OWED, C 0 "' 0 svx 0 10 Pt 0 01 014 SZ Service Manual VP150m LZO. OV 14 V I /CIS 00404000M 7 0 L 00,4.0 •1. 0,00. 011.0,0 e 1000,2, 02.3 P " TO This product uses an external power adaptor to provide the DC+12 voltage. In order to greatly reduce the power consumption when in power saving stage, the circuit in Fig 1 (above) is used not only to convert the +12V to +5V, but also to control the 5V on/off status. IC30 (4013) is a D-flip flop CMOS and IC18 is a Pchannel MOSFET. When Vgs < 0.7V, MOS turns on as shown in the circuit. When +12V DC current enters W09, it generates a pulse through C115 and presets the Flip-Flop. Then 1C30 (4013) pint is held high, preventing IC18 from outputting +12V, and the whole system is kept at OFF status. When the power switch is pressed, pin3 of IC30 generates a pulse to force Q to low level, pin? & pin8 is conducted and 12V enters the whole system. There are two regulators that convert the 12V to 5V. They are +5Vx and VLCD. The comparator or of IC20 will make the output of two regulators as a feed back to compare to the reference voltage. The compared result will then control ON/OFF of IC19. Time required to achieve the voltage regulation affects zd04 and will create the reference voltage. Q13, Q14 and MC4049 are basically used to speed up the MOSFET ON/OFF switching time in order to reduce IC19 power consumption. This product is also equipped with an over-voltage protection circuit. When voltage at W09 is over 15Volts, Q12 will turn on to make pin 6 of IC30 high and IC18 will be off. The +5V and VLCD source provide most of the required power for the VP150m and LCD panel. When the system enters the power saving stage, the above two power sources will turn off through pin3 of IC25. The +5V source provides power to the CPU and SYNC processor, so it must be isolated from other power sources. When in power saving stage, pin3 of IC25 will be set to low level to cut off +5V and VLCD. Confidential - Do Not Copy Page 17

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ViewSonic
September
2000
-
Version
1.0
Service
Manual
VP150m
THEORY
OF
CIRCUIT
OPERATION
W
09
OWED,
O
C
0
"'
0
svx
LZO
.
OV
14
V
I
/CIS
00404000M
0
10
Pt
0
0 1
014
7
0
L
SZ
00,4.0
•1
.
0,00.
011.0
,
0
e
1000,2,
02.3
P
"
TO
This
product
uses
an
external
power
adaptor
to
provide
the
DC+12
voltage.
In
order
to
greatly
reduce
the
power
consumption
when
in
power
saving
stage,
the
circuit
in
Fig
1
(above)
is
used
not
only
to
convert
the
+12V
to
+5V,
but
also
to
control
the
5V
on/off
status.
IC30
(4013)
is
a
D
-flip
flop
CMOS
and
IC18
is
a
P
-
channel
MOSFET.
When
Vgs
<
0.7V,
MOS
turns
on
as
shown
in
the
circuit.
When
+12V
DC
current
enters
W09,
it
generates
a
pulse
through
C115
and
presets
the
Flip
-Flop.
Then
1C30
(4013)
pint
is
held
high,
preventing
IC18
from
outputting
+12V,
and
the
whole
system
is
kept
at
OFF
status.
When
the
power
switch
is
pressed,
pin3
of
IC30
generates
a
pulse
to
force
Q
to
low
level,
pin?
&
pin8
is
conducted
and
12V
enters
the
whole
system.
There
are
two
regulators
that
convert
the
12V
to
5V.
They
are
+5Vx
and
VLCD.
The
comparator
or
of
IC20
will
make
the
output
of
two
regulators
as
a
feed
back
to
compare
to
the
reference
voltage.
The
compared
result
will
then
control
ON/OFF
of
IC19.
Time
required
to
achieve
the
voltage
regulation
affects
zd04
and
will
create
the
reference
voltage.
Q13,
Q14
and
MC4049
are
basically
used
to
speed
up
the
MOSFET
ON/OFF
switching
time
in
order
to
reduce
IC19
power
consumption.
This
product
is
also
equipped
with
an
over
-voltage
protection
circuit.
When
voltage
at
W09
is
over
15Volts,
Q12
will
turn
on
to
make
pin
6
of
IC30
high
and
IC18
will
be
off.
The
+5V
and
VLCD
source
provide
most
of
the
required
power
for
the
VP150m
and
LCD
panel.
When
the
system
enters
the
power
saving
stage,
the
above
two
power
sources
will
turn
off
through
pin3
of
IC25.
The
+5V
source
provides
power
to
the
CPU
and
SYNC
processor,
so
it
must
be
isolated
from
other
power
sources.
When
in
power
saving
stage,
pin3
of
IC25
will
be
set
to
low
level
to
cut
off
+5V
and
VLCD.
Confidential
—
Do
Not
Copy
Page
17