AMD 3200 Revision History - Page 28
Lightweight, Profiling, Counters, Counting, Instruction-Based, Sampling, Enabled
UPC - 730143241144
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Revision Guide for AMD Family 15h Models 00h-0Fh Processors 48063 Rev. 3.18 October 2012 520 Some Lightweight Profiling Counters Stop Counting When Instruction-Based Sampling is Enabled Description When Lightweight Profiling (LWP) and Instruction-Based Sampling (IBS) measurement of instruction execution are simultaneously enabled, the following LWP counters do not increment: • Instructions retired event counter (LWP EventId 2) • Branches retired event counter (LWP EventId 3) LWP is enabled once software executes a LLWCP or XRSTOR instruction with a valid LWPCB address. IBS instruction execution sampling is enabled when IBS Execution Control[IbsOpEn] (MSRC001_1033[17]) is 1b. Potential Effect on System Performance monitoring software using LWP may not have a count of instructions retired or branches retired. Suggested Workaround None. Fix Planned Yes 28 Product Errata