AMD 3200 Revision History - Page 73
Processor, Limited, Minimum, P-state, After, state, Limit, Change
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48063 Rev. 3.18 October 2012 Revision Guide for AMD Family 15h Models 00h-0Fh Processors 709 Processor May Be Limited to Minimum P-state After a Pstate Limit Change Description Following a change to the P-state limit or a core C6 (CC6) exit, the processor may incorrectly restrict the processor to the lowest-performing P-state (Clock Power/Timing Control 2 Register[HwPstateMaxVal], D18F3xDC[10:8]). This restriction may not match any of the actual P-state limits and does not get removed until a processor reset occurs. P-state limit changes that may cause this erratum may be due to SB-RMI (SBI P-state Limit[PstateLimit], MSRC001_0072[10:8]), software (Software P-state Limit Register[SwPstateLimit], D18F3x68[30:28]), or hardware thermal control (entering HTC-active state, i.e. PROCHOT# assertion). Potential Effect on System Processor performance is limited to the lowest-performing P-state. Suggested Workaround Contact your AMD representative for information on a BIOS update. Fix Planned No fix planned Product Errata 73