AMD 3200 Revision History - Page 57
Debug, Breakpoint, Misaligned, Store, Cause, System
UPC - 730143241144
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48063 Rev. 3.18 October 2012 Revision Guide for AMD Family 15h Models 00h-0Fh Processors 671 Debug Breakpoint on Misaligned Store May Cause System Hang Description A misaligned store that crosses cache lines and requires an address translation due to a TLB miss may cause a system hang if the trailing cache line has an address breakpoint enabled using DR7. Potential Effect on System System hang. Suggested Workaround Contact your AMD representative for information on a BIOS update. This workaround has a performance impact when certain debug breakpoints are enabled. System developers that wish to enable debug breakpoints without this workaround may first set MSRC001_1000[17] = 1b. AMD recommends this workaround be enabled with AMD Opteron™ processors. For all other processors, BIOS should disable the workaround by setting MSRC001_1000[17] = 1b. Fix Planned Yes Product Errata 57