AMD 3200 Revision History - Page 77
Instruction-Based, Sampling, Fetch, Counter, Always, Starts, Maximum, Value
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48063 Rev. 3.18 October 2012 Revision Guide for AMD Family 15h Models 00h-0Fh Processors 719 Instruction-Based Sampling Fetch Counter Always Starts at Maximum Value Description When setting IBS Fetch Control Register[IbsFetchEn] = 1b to enable IBS fetch sampling, the periodic fetch counter always starts at the maximum value programmed into IBS Fetch Control Register[IbsFetchMaxCnt] (MSRC001_1030[15:0]) instead of starting at the value written into IBS Fetch Control Register[IbsFetchCnt] (MSRC001_1030[19:4]). Potential Effect on System System software that is managing multiple processes or virtual machines with different IBS configurations may create unintended delays before the next IBS sample by writing to MSRC001_1030. In the event that system software consistently writes to MSRC001_1030, it is possible that the IBS fetch counter never expires and no instruction fetches are tagged. AMD has not observed this effect with production software. Suggested Workaround None. Fix Planned No fix planned Product Errata 77