AMD 3200 Revision History - Page 89
Processor, Incorrectly, Report, Cache, Sharing, Property, CPUID, Topology
UPC - 730143241144
View all AMD 3200 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 89 highlights
48063 Rev. 3.18 October 2012 Revision Guide for AMD Family 15h Models 00h-0Fh Processors 745 Processor May Incorrectly Report Cache Sharing Property in CPUID Topology Description On processor models that have a single core per compute-unit (Compute Unit Status Register[DualCore], D18F5x80[16] is 0b), CPUID Fn8000_001D_EAX_x1[NumSharingCache, bits 25:15] and CPUID Fn8000_001D_EAX_x2[NumSharingCache, bits 25:15] incorrectly report that the instruction cache and the L2 cache as being shared between two processor cores. On the above-mentioned processor models, the instruction cache and the L2 cache are not shared and software would not find two processor cores that reported the same Compute Unit ID (CPUID Fn8000_001E_EBX[ComputeUnitID, bits 7:0]). Potential Effect on System Software may incorrectly observe the topology of the instruction cache and the L2 cache. Suggested Workaround None required. Fix Planned Yes Product Errata 89