AMD 3200 Revision History - Page 36
AMD 3200 - Athlon 64 2.0 GHz Processor Manual
UPC - 730143241144
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Revision Guide for AMD Family 15h Models 00h-0Fh Processors 48063 Rev. 3.18 October 2012 586 A Far Control Transfer Changing Processor Operating Mode May Generate a False Machine Check Description A far control transfer that changes the processor operating mode may erroneously indicate a decoder instruction buffer parity error (DEIBP) machine check, leading to a system shutdown. The extended error code logged in the IF Machine Check Status register indicates a decode instruction buffer error (MSR0000_0405[20:16] = 10010b). Potential Effect on System Machine check exception due to a decoder instruction buffer parity error leading to system shutdown. Suggested Workaround BIOS should set MSRC001_0045[18] = 1b (MC1_CTL_MASK[DEIBP]). Fix Planned Yes 36 Product Errata