Intel P4000RP Technical Product Specification - Page 39

Integrated Baseboard Management Controller BMC Overview

Page 39 highlights

Intel® Server Board S1200V3RP Functional Architecture (slaves). Also, the Intel® C220 series chipset supports slave functionality, including the Host Notify protocol. Hence, the host controller supports eight command protocols of the SMBus* interface (see System Management Bus (SMBus*) Specification, Version 2.0): Quick Command, Send Byte, Receive Byte, Write Byte/Word, Read Byte/Word, Process Call, Block Read/Write, and Host Notify. The Intel® C220 series chipset's SMBus* also implements hardware-based Packet Error Checking for data robustness and the Address Resolution Protocol (ARP) to dynamically provide address to all SMBus* devices. 3.4.12 Intel® Virtualization Technology for Direct I/O (Intel® VT-d) The Intel® C220 series chipset provides hardware support for implementation of Intel® Virtualization Technology with Directed I/O (Intel® VT-d). Intel® VT-d Technology consists of technology components that support the virtualization of platforms based on Intel® Architecture Processors. Intel® VT-d Technology enables multiple operating systems and applications to run in independent partitions. A partition behaves like a Virtual Machine (VM) and provides isolation and protection across partitions. Each partition is allocated its own subset of host physical memory. 3.5 Integrated Baseboard Management Controller (BMC) Overview The server board utilizes the I/O controller, Graphics Controller, and Baseboard Management features of the Emulex* Pilot-III Management Controller. The following is an overview of the features as implemented on the server board from each embedded controller. Figure 12. Integrated Baseboard Management Controller (BMC) Overview Revision 1.0 27

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Intel® Server Board S1200V3RP
Functional Architecture
(slaves). Also, the Intel
®
C220 series chipset supports slave functionality, including the Host
Notify protocol. Hence, the host controller supports eight command protocols of the SMBus*
interface (see
System Management Bus (SMBus*) Specification, Version 2.0
): Quick Command,
Send Byte, Receive Byte, Write Byte/Word, Read Byte/Word, Process Call, Block Read/Write,
and Host Notify.
The Intel
®
C220 series chipset’s SMBus* also implements hardware-based Packet Error
Checking for data robustness and the Address Resolution Protocol (ARP) to dynamically
provide address to all SMBus* devices.
3.4.12
Intel
®
Virtualization Technology for Direct I/O (Intel
®
VT-d)
The Intel
®
C220 series chipset provides hardware support for implementation of Intel
®
Virtualization Technology with Directed I/O (Intel
®
VT-d). Intel
®
VT-d Technology consists of
technology components that support the virtualization of platforms based on Intel
®
Architecture
Processors. Intel
®
VT-d Technology enables multiple operating systems and applications to run
in independent partitions. A partition behaves like a Virtual Machine (VM) and provides isolation
and protection across partitions. Each partition is allocated its own subset of host physical
memory.
3.5
Integrated Baseboard Management Controller (BMC) Overview
The server board utilizes the I/O controller, Graphics Controller, and Baseboard Management
features of the Emulex* Pilot-III Management Controller. The following is an overview of the
features as implemented on the server board from each embedded controller.
Figure 12. Integrated Baseboard Management Controller (BMC) Overview
Revision 1.0
27