eMachines D620 Service Guide - Page 85

Disable onboard Super I/O ports and IRQs, Beeps, POST Routine Description - motherboard

Page 85 highlights

Code 46h 48h 49h 4Ah 4Bh 4Ch 4Eh 50h 51h 52h 54h 58h 59h 5Ah 5Bh 5Ch 60h 62h 64h 66h 67h 68h 69h 6Ah 6Bh 6Ch 6Eh 70h 72h 76h 7Ch 7Eh 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h Beeps 2-1-2-3 2-2-3-1 POST Routine Description Check ROM copyright notice Check video configuration against CMOS Initialize PCI bus and devices Initialize all video adapters in system QuietBoot start (optional) Shadow video BIOS ROM Display BIOS copyright notice Display CPU type and speed Initialize EISA board Test keyboard Set key click if enabled Test for unexpected interrupts Initialize POST display service Display prompt "Press F2 to enter SETUP" Disable CPU cache Test RAM between 512 and 640 KB Test extended memory Test extended memory address lines Jump to User Patch1 Configure advanced cache registers Initialize Multi Processor APIC Enable external and CPU caches Setup System Management Mode (SMM) area Display external L2 cache size Load custom defaults (optional) Display shadow-area message Display possible high address for UMB recovery Display error messages Check for configuration errors Check for keyboard errors Set up hardware interrupt vectors Initialize coprocessor if present Disable onboard Super I/O ports and IRQs Late POST device initialization Detect and install external RS232 ports Configure non-MCD IDE controllers Detect and install external parallel ports Initialize PC-compatible PnP ISA devices Re-initialize onboard I/O ports Configure Motherboard Configurable Devices (optional) Initialize BIOS Data Area Enable Non-Maskable Interrupts (NMIs) Chapter 4 95

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Chapter 4
95
46h
2-1-2-3
Check ROM copyright notice
48h
Check video configuration against CMOS
49h
Initialize PCI bus and devices
4Ah
Initialize all video adapters in system
4Bh
QuietBoot start (optional)
4Ch
Shadow video BIOS ROM
4Eh
Display BIOS copyright notice
50h
Display CPU type and speed
51h
Initialize EISA board
52h
Test keyboard
54h
Set key click if enabled
58h
2-2-3-1
Test for unexpected interrupts
59h
Initialize POST display service
5Ah
Display prompt “Press F2 to enter SETUP”
5Bh
Disable CPU cache
5Ch
Test RAM between 512 and 640 KB
60h
Test extended memory
62h
Test extended memory address lines
64h
Jump to User Patch1
66h
Configure advanced cache registers
67h
Initialize Multi Processor APIC
68h
Enable external and CPU caches
69h
Setup System Management Mode (SMM) area
6Ah
Display external L2 cache size
6Bh
Load custom defaults (optional)
6Ch
Display shadow-area message
6Eh
Display possible high address for UMB recovery
70h
Display error messages
72h
Check for configuration errors
76h
Check for keyboard errors
7Ch
Set up hardware interrupt vectors
7Eh
Initialize coprocessor if present
80h
Disable onboard Super I/O ports and IRQs
81h
Late POST device initialization
82h
Detect and install external RS232 ports
83h
Configure non-MCD IDE controllers
84h
Detect and install external parallel ports
85h
Initialize PC-compatible PnP ISA devices
86h
Re-initialize onboard I/O ports
87h
Configure Motherboard Configurable Devices (optional)
88h
Initialize BIOS Data Area
89h
Enable Non-Maskable Interrupts (NMIs)
Code
Beeps
POST Routine Description