IBM DTLA-305040 Hard Drive Specifications - Page 52

Addressing of registers, 2.6 Cabling, Alt. Status Reg.

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7.2.5 Addressing of registers The host addresses the drive through a set of registers called the Task File. These registers are mapped into the I/ O space of the host. Two chip select lines (CS0- and CS1-) and three address lines (DA0-02) are used to select one of these registers, while a DIOR- or DIOW- is provided at the specified time. The CS0- is used to address Command Block registers. while the CS1- is used to address Control Block registers. The following table shows the I/ O address map. CS0- CS1- DA2 DA1 DA0 DIOR- = 0 (Read) DIOW- = 0 (Write) Command Block Registers 0 1 0 0 0 Data Reg. Data Reg. 0 1 0 0 1 Error Reg. Features Reg. 0 1 0 1 0 Sector count Reg. Sector count Reg. 0 1 0 1 1 Sector number Reg. Sector number Reg. 0 1 1 0 0 Cylinder low Reg. Cylinder low Reg. 0 1 1 0 1 Cylinder high Reg. Cylinder high Reg. 0 1 1 1 0 Drive/Head Reg. Drive/Head Reg. 0 1 1 1 1 Status Reg. Command Reg. Control Block Registers 1 0 1 1 0 Alt. Status Reg. Device control Reg. 1 0 1 1 1 Drive address Reg. - Figure 42. I/O address map During DMA operation (from writing to the command register until an interrupt) all registers are not accessible. For example, the host is not supposed to read status register contents before interrupt (the value is invalid). 7.2.6 Cabling The maximum cable length from the host system to the drive plus circuit pattern length in the host system shall not exceed 18 inches. For higher data transfer application (>8.3MB/sec) a modification in the system design is recommended to reduce cable noise and/or cross-talk, such as a shorter cable, bus termination, or a shielded cable. For systems operating with Ultra DMA mode 3 or 4, 80-conductor ATA cable assembly (SFF-8049) shall be used. Deskstar 40GV & 75GXP hard disk drive specifications 40

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7.2.5 Addressing of registers
The host addresses the drive through a set of registers called the Task File. These registers are mapped
into the I/ O space of the host. Two chip select lines (CS0– and CS1–) and three address lines (DA0-02)
are used to select one of these registers, while a DIOR– or DIOW– is provided at the specified time.
The CS0– is used to address Command Block registers. while the CS1– is used to address Control Block
registers.
The following table shows the I/ O address map.
–
Drive address Reg.
1
1
1
0
1
Device control Reg.
Alt. Status Reg.
0
1
1
0
1
Control Block Registers
Command Reg.
Status Reg.
1
1
1
1
0
Drive/Head Reg.
Drive/Head Reg.
0
1
1
1
0
Cylinder high Reg.
Cylinder high Reg.
1
0
1
1
0
Cylinder low Reg.
Cylinder low Reg.
0
0
1
1
0
Sector number Reg.
Sector number Reg.
1
1
0
1
0
Sector count Reg.
Sector count Reg.
0
1
0
1
0
Features Reg.
Error Reg.
1
0
0
1
0
Data Reg.
Data Reg.
0
0
0
1
0
Command Block Registers
DIOW– = 0 (Write)
DIOR– = 0 (Read)
DA0
DA1
DA2
CS1–
CS0–
Figure 42. I/O address map
During DMA operation (from writing to the command register until an interrupt) all registers are not acces-
sible.
For example, the host is not supposed to read status register contents before interrupt (the value is in-
valid).
7.2.6 Cabling
The maximum cable length from the host system to the drive plus circuit pattern length in the host system
shall not exceed 18 inches.
For higher data transfer application (>8.3MB/sec) a modification in the system design is recommended to
reduce cable noise and/or cross-talk, such as a shorter cable, bus termination, or a shielded cable.
For systems operating with Ultra DMA mode 3 or 4, 80-conductor ATA cable assembly (SFF-8049) shall
be used.
Deskstar 40GV & 75GXP hard disk drive specifications
40