IBM SAN16B-2 User Guide - Page 72

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asynchronous transfer mode (ATM). A method of transmission in which the sending and receiving of data is controlled by control characters such as a start bit and a stop bit, instead of by a timing sequence. ATM. See asynchronous transfer mode. autonegotiation. A universal mechanism to exchange network capabilities between two Ethernet nodes. The exchange takes place at power-up (or link reset) time. It automatically establishes a link that takes advantage of the highest common denominator of the mutual capabilities of the two Ethernet nodes. The universal mechanism negotiates capabilities that include link speed, PHY types, and full duplex or half duplex. autoranging. A power supply that accommodates different input voltages and line frequencies. AW_TOV. See arbitration wait timeout value. B backup FCS switch. The switch or switches assigned as backup in case the primary fabric configuration server (FCS) switch fails. See also fabric configuration server switch and primary FCS switch. bandwidth. (1) The total transmission capacity of a cable, link, or system. Usually measured in bits per second (bps). (2) The range of transmission frequencies available to a network. See also throughput. basic input/output system (BIOS). Code that controls basic hardware operations, such as interactions with diskette drives, hard disk drives, and the keyboard. BB_credit. See buffer-to-buffer credit. beacon. When all the port light-emitting diodes (LEDs) on a switch are set to flash from one side of the switch to the other, to enable identification of an individual switch in a large fabric. A switch can be set to beacon by a CLI command or through Web Tools. beginning running disparity. The disparity at the transmitter or receiver when the special character associated with an ordered set is encoded or decoded. See also disparity. BER. See bit error rate. BIOS. See basic input/output system. BISR. Built-in self-repair. BIST. Built-in self-test. bit error rate (BER). The rate at which bits are expected to be received in error. Expressed as the ratio of error bits to total bits transmitted. See also error. blade. A component that provides application-specific services and components. A blade is typically a hot swappable hardware device. block. As applies to Fibre Channel, upper-level application data that is transferred in a single sequence. boot code. Software that initialized the system environment during the early phase of the boot-up process. For example, boot code might determine the amount of available memory and how to access it. boot flash. Flash memory that stores the boot code and boot parameters. The processor runs its first instructions from boot flash. Data is cached in random access memory (RAM). British thermal unit (Btu). The amount of heat required to raise a pound of water by 1 degree Fahrenheit. broadcast. The transmission of data from a single source to all devices in the fabric, regardless of zoning. See also multicast and unicast. Btu. See British thermal unit. buffer-to-buffer credit. The number of frames that can be transmitted to a directly-connected recipient or within an arbitrated loop. Determined by the number of receive buffers available. See also buffer-to-buffer flow control. buffer-to-buffer flow control. Management of the frame transmission rate in either a point-to-point topology or in an arbitrated loop. See also buffer-to-buffer credit. C CAM. Content addressable memory. cache. A buffer that contains frequently accessed instructions and data; it is used to reduce access time. cascade. Two or more interconnected Fibre Channel switches that can build large fabrics. Switches can be cascaded up to 239 switches, with a recommended maximum of seven inter-switch links (no path longer than eight switches). See also fabric and inter-switch link. central processing unit (CPU). The part of a computer that includes the circuits that control the interpretation and running of instructions. A CPU is the circuitry and storage that executes instructions. Traditionally, the complete processing unit was often regarded as the CPU, whereas today the CPU is often a microchip. In either case, the centrality of a processor or processing unit depends on the configuration of the system or network in which it is used. 50 SAN16B-2 Installation, Service, and User's Guide

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asynchronous
transfer
mode
(ATM).
A
method
of
transmission
in
which
the
sending
and
receiving
of
data
is
controlled
by
control
characters
such
as
a
start
bit
and
a
stop
bit,
instead
of
by
a
timing
sequence.
ATM.
See
asynchronous
transfer
mode
.
autonegotiation.
A
universal
mechanism
to
exchange
network
capabilities
between
two
Ethernet
nodes.
The
exchange
takes
place
at
power-up
(or
link
reset)
time.
It
automatically
establishes
a
link
that
takes
advantage
of
the
highest
common
denominator
of
the
mutual
capabilities
of
the
two
Ethernet
nodes.
The
universal
mechanism
negotiates
capabilities
that
include
link
speed,
PHY
types,
and
full
duplex
or
half
duplex.
autoranging.
A
power
supply
that
accommodates
different
input
voltages
and
line
frequencies.
AW_TOV.
See
arbitration
wait
timeout
value
.
B
backup
FCS
switch.
The
switch
or
switches
assigned
as
backup
in
case
the
primary
fabric
configuration
server
(FCS)
switch
fails.
See
also
fabric
configuration
server
switch
and
primary
FCS
switch
.
bandwidth.
(1)
The
total
transmission
capacity
of
a
cable,
link,
or
system.
Usually
measured
in
bits
per
second
(bps).
(2)
The
range
of
transmission
frequencies
available
to
a
network.
See
also
throughput
.
basic
input/output
system
(BIOS).
Code
that
controls
basic
hardware
operations,
such
as
interactions
with
diskette
drives,
hard
disk
drives,
and
the
keyboard.
BB_credit.
See
buffer-to-buffer
credit
.
beacon.
When
all
the
port
light-emitting
diodes
(LEDs)
on
a
switch
are
set
to
flash
from
one
side
of
the
switch
to
the
other,
to
enable
identification
of
an
individual
switch
in
a
large
fabric.
A
switch
can
be
set
to
beacon
by
a
CLI
command
or
through
Web
Tools.
beginning
running
disparity.
The
disparity
at
the
transmitter
or
receiver
when
the
special
character
associated
with
an
ordered
set
is
encoded
or
decoded.
See
also
disparity
.
BER.
See
bit
error
rate
.
BIOS.
See
basic
input/output
system
.
BISR.
Built-in
self-repair.
BIST.
Built-in
self-test.
bit
error
rate
(BER).
The
rate
at
which
bits
are
expected
to
be
received
in
error.
Expressed
as
the
ratio
of
error
bits
to
total
bits
transmitted.
See
also
error
.
blade.
A
component
that
provides
application-specific
services
and
components.
A
blade
is
typically
a
hot
swappable
hardware
device.
block.
As
applies
to
Fibre
Channel,
upper-level
application
data
that
is
transferred
in
a
single
sequence.
boot
code.
Software
that
initialized
the
system
environment
during
the
early
phase
of
the
boot-up
process.
For
example,
boot
code
might
determine
the
amount
of
available
memory
and
how
to
access
it.
boot
flash.
Flash
memory
that
stores
the
boot
code
and
boot
parameters.
The
processor
runs
its
first
instructions
from
boot
flash.
Data
is
cached
in
random
access
memory
(RAM).
British
thermal
unit
(Btu).
The
amount
of
heat
required
to
raise
a
pound
of
water
by
1
degree
Fahrenheit.
broadcast.
The
transmission
of
data
from
a
single
source
to
all
devices
in
the
fabric,
regardless
of
zoning.
See
also
multicast
and
unicast
.
Btu.
See
British
thermal
unit
.
buffer-to-buffer
credit.
The
number
of
frames
that
can
be
transmitted
to
a
directly-connected
recipient
or
within
an
arbitrated
loop.
Determined
by
the
number
of
receive
buffers
available.
See
also
buffer-to-buffer
flow
control
.
buffer-to-buffer
flow
control.
Management
of
the
frame
transmission
rate
in
either
a
point-to-point
topology
or
in
an
arbitrated
loop.
See
also
buffer-to-buffer
credit
.
C
CAM.
Content
addressable
memory.
cache.
A
buffer
that
contains
frequently
accessed
instructions
and
data;
it
is
used
to
reduce
access
time.
cascade.
Two
or
more
interconnected
Fibre
Channel
switches
that
can
build
large
fabrics.
Switches
can
be
cascaded
up
to
239
switches,
with
a
recommended
maximum
of
seven
inter-switch
links
(no
path
longer
than
eight
switches).
See
also
fabric
and
inter-switch
link
.
central
processing
unit
(CPU).
The
part
of
a
computer
that
includes
the
circuits
that
control
the
interpretation
and
running
of
instructions.
A
CPU
is
the
circuitry
and
storage
that
executes
instructions.
Traditionally,
the
complete
processing
unit
was
often
regarded
as
the
CPU,
whereas
today
the
CPU
is
often
a
microchip.
In
either
case,
the
centrality
of
a
processor
or
processing
unit
depends
on
the
configuration
of
the
system
or
network
in
which
it
is
used.
50
SAN16B-2
Installation,
Service,
and
User’s
Guide