Lenovo PC 300PL Technical Information Manual 6275, 6285 - Page 76

Appendix B. System Address Maps, System Memory Map, Input/Output Address Map

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Appendix B. System Address Maps Appendix B. System Address Maps System Memory Map The first 640 KB of system board RAM is mapped starting at address hex 0000000. A 256-byte area and a 1 KB area of this RAM are reserved for BIOS data areas. Memory can be mapped differently if POST detects an error. Figure 48. System Memory Map Address Range (decimal) Address Range (hex) 0 K - 512 K 00000-7FFFF 512 K - 639 K 80000-9FBFF 639 K - 640 K 9FC00-9FFFF 640 K - 800 K A0000-C7FFF 800 K - 896 K C8000-DFFFF 896 K - 928 K E0000-E7FFF 928 K - 992 K F0000-FFFFF 1024 K - 262144 K 100000-10000000 Size 512 KB 127 KB 1 KB 160 KB 96 KB 32 KB 64 KB 255 MB Description Conventional Extended conventional Extended BIOS data Video memory and BIOS PCI/ISA space, available to adapter ROMs POST/BIOS(sys ROM, shadowed in maintenance) POST/BIOS (sys ROM, shadowed in maintenance) Extended Input/Output Address Map The following figure lists resource assignments for the I/O address map. Any addresses that are not shown are reserved. Figure 49 (Page 1 of 3). I/O Address Map Address (Hex) Size 0000-000F 16 bytes 0020-0021 2 bytes 002E-002F 2 bytes 0040-0043 4 bytes 0048-004B 4 bytes 0060 1 byte 0061 1 byte 0064 1 byte 0070, bit 7 1 bit 0070, bits 6:0 1 bit 0071 1 byte 0078 1 byte 0079 1 byte 0080-008F 16 bytes 00A0-00A1 2 bytes 00B2-00B3 2 bytes Description DMA 1 Interrupt controller 1 I/O controller configuration registers Counter/timer 1 Counter/timer 2 Keyboard controller byte - reset IRQ NMI, speaker control Keyboard controller, CMD/STAT byte Enable NMI Real time clock, address Real time clock, data Reserved - system board configuration Reserved - system board configuration DMA page registers Interrupt controller 2 APM control 64 Copyright IBM Corp. June 1998

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Appendix B.
System Address Maps
Appendix B.
System Address Maps
System Memory Map
The first 640 KB of system board RAM is mapped starting at address hex 0000000.
A 256-byte area and
a 1 KB area of this RAM are reserved for BIOS data areas.
Memory can be mapped differently if POST
detects an error.
Input/Output Address Map
The following figure lists resource assignments for the I/O address map.
Any addresses that are not
shown are reserved.
Figure 48. System Memory Map
Address Range (decimal)
Address Range (hex)
Size
Description
0 K – 512 K
00000–7FFFF
512 KB
Conventional
512 K – 639 K
80000–9FBFF
127 KB
Extended conventional
639 K – 640 K
9FC00–9FFFF
1 KB
Extended BIOS data
640 K – 800 K
A0000–C7FFF
160 KB
Video memory and BIOS
800 K – 896 K
C8000–DFFFF
96 KB
PCI/ISA space, available to
adapter ROMs
896 K – 928 K
E0000–E7FFF
32 KB
POST/BIOS(sys ROM,
shadowed in maintenance)
928 K – 992 K
F0000–FFFFF
64 KB
POST/BIOS (sys ROM,
shadowed in maintenance)
1024 K – 262144 K
100000–10000000
255 MB
Extended
Figure 49 (Page 1 of 3). I/O Address Map
Address (Hex)
Size
Description
0000–000F
16 bytes
DMA 1
0020–0021
2 bytes
Interrupt controller 1
002E–002F
2 bytes
I/O controller configuration registers
0040–0043
4 bytes
Counter/timer 1
0048–004B
4 bytes
Counter/timer 2
0060
1 byte
Keyboard controller byte - reset IRQ
0061
1 byte
NMI, speaker control
0064
1 byte
Keyboard controller, CMD/STAT byte
0070, bit 7
1 bit
Enable NMI
0070, bits 6:0
1 bit
Real time clock, address
0071
1 byte
Real time clock, data
0078
1 byte
Reserved - system board configuration
0079
1 byte
Reserved - system board configuration
0080–008F
16 bytes
DMA page registers
00A0–00A1
2 bytes
Interrupt controller 2
00B2–00B3
2 bytes
APM control
64
Copyright IBM Corp. June 1998