Sony HCD-ZUX9 Service Manual - Page 77

Tc94a70fg-008 S, D Rf Amp, Focus/tracking Error Amp, Digital Signal Processor, Digital

Page 77 highlights

HCD-ZUX9 • IC Pin Descriptions IC101 TC94A70FG-008 (S, D) (RF AMP, FOCUS/TRACKING ERROR AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (BD91 BOARD) Pin No. Pin Name I/O Pin Description 1 AVSS3 - Ground 2 RFZi I RF ripple zero crossing signal input 3 RFRP O RF ripple signal output 4 SBAD/RFDC O Sub beam addition signal or RF peak detection signal output Not used. (Open) 5 FEi O Focus error signal output (Check pin) 6 TEi O Tracking error signal output 7 TEZi I Tracking error zero crossing signal input 8 AVDD3 - Power supply (+3.3 V) 9 FOo O Focus coil drive signal output 10 TRo O Tracking coil drive signal output 11 VREF I Reference voltage (+1.65 V) input 12 FMO O Sled motor drive signal output 13 DMO O Spindle motor drive signal output 14 VSSP3 - Ground 15 VCOi I VCO control voltage input 16 VDDP3 - Power supply (+3.3 V) 17 VDD1 - Power supply (+1.5 V) 18 VSS1 - Ground 19 FGiN I FG signal input Not used. (Connected to ground.) 20 IO0 (/HSO) I Disc inner position detection signal input 21 IO1 (/UHSO) O Not used. (Open) 22 XVSS3 - Ground 23 XI I System clock input (16.9344 MHz) 24 XO O System clock output (16.9344 MHz) 25 XVDD3 - Power supply (+3.3 V) 26 DVSS3 - Ground 27 RO O Analog audio (R-ch) signal output 28 DVDD3 - Power supply (+3.3 V) 29 DVR O Reference voltage (+1.65 V) output 30 LO O Analog audio (L-ch) signal output 31 DVSS3 - Ground 32 VDDT3 - Power supply (+3.3 V) 33 VSS1 - Ground 34 VDD1 - Power supply (+1.5 V) 35 VDDM1 - Power supply (+1.5 V) 36 SRAMSTB I S-RAM standby mode control signal input Fixed at "L" in this set. 37 RST I Reset signal input from the system controller "L": reset 38, 39 BUS0, BUS1 I/O Serial data input/output from the system controller or USB controller 40 BUS2 (SO) I/O Serial data input/output from the system controller or USB controller 41 BUS3 (SI) I/O Serial data input/output from the system controller or USB controller 42 BUCK (CLK) I Serial data transfer clock signal input from the system controller or USB controller 43 CCE I Chip enable signal input from the system controller or USB controller 44 TEST I Setting pin for test mode Normally fixed at "L" 45 IRQ I Interrupt request signal input 77

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118

77
HCD-ZUX9
IC Pin Descriptions
IC101
TC94A70FG-008 (S, D) (RF AMP, FOCUS/TRACKING ERROR AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL
SERVO PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (BD91 BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
AVSS3
Ground
2
RFZi
I
RF ripple zero crossing signal input
3
RFRP
O
RF ripple signal output
4
SBAD/RFDC
O
Sub beam addition signal or RF peak detection signal output
Not used. (Open)
5
FEi
O
Focus error signal output (Check pin)
6
TEi
O
Tracking error signal output
7
TEZi
I
Tracking error zero crossing signal input
8
AVDD3
Power supply (+3.3 V)
9
FOo
O
Focus coil drive signal output
10
TRo
O
Tracking coil drive signal output
11
VREF
I
Reference voltage (+1.65 V) input
12
FMO
O
Sled motor drive signal output
13
DMO
O
Spindle motor drive signal output
14
VSSP3
Ground
15
VCOi
I
VCO control voltage input
16
VDDP3
Power supply (+3.3 V)
17
VDD1
Power supply (+1.5 V)
18
VSS1
Ground
19
FGiN
I
FG signal input
Not used. (Connected to ground.)
20
IO0 (/HSO)
I
Disc inner position detection signal input
21
IO1 (/UHSO)
O
Not used. (Open)
22
XVSS3
Ground
23
XI
I
System clock input (16.9344 MHz)
24
XO
O
System clock output (16.9344 MHz)
25
XVDD3
Power supply (+3.3 V)
26
DVSS3
Ground
27
RO
O
Analog audio (R-ch) signal output
28
DVDD3
Power supply (+3.3 V)
29
DVR
O
Reference voltage (+1.65 V) output
30
LO
O
Analog audio (L-ch) signal output
31
DVSS3
Ground
32
VDDT3
Power supply (+3.3 V)
33
VSS1
Ground
34
VDD1
Power supply (+1.5 V)
35
VDDM1
Power supply (+1.5 V)
36
SRAMSTB
I
S-RAM standby mode control signal input
Fixed at “L” in this set.
37
RST
I
Reset signal input from the system controller
“L”: reset
38, 39
BUS0, BUS1
I/O
Serial data input/output from the system controller or USB controller
40
BUS2 (SO)
I/O
Serial data input/output from the system controller or USB controller
41
BUS3 (SI)
I/O
Serial data input/output from the system controller or USB controller
42
BUCK (CLK)
I
Serial data transfer clock signal input from the system controller or USB controller
43
CCE
I
Chip enable signal input from the system controller or USB controller
44
TEST
I
Setting pin for test mode
Normally fixed at “L”
45
IRQ
I
Interrupt request signal input