Sony HCD-ZUX9 Service Manual - Page 78

Pin No., Pin Name, Pin Description

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HCD-ZUX9 Pin No. 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 Pin Name AoUT3 (PO4) AoUT2 (PO5) PIO0 PIO1 PIO2 PIO3 VSS1 VDDT3 SBSY SBOK/FOK IPF SFSY/LOCK ZDET GPIN MS DOUT (PO6) AOUT1 (PO7) BCK (PO8) LRCK (PO9) AIN (PI4) BCKi (PI5) LRCKi (PI6) VDD1 VSS AWRC PVDD3 PDO TMAXS TMAX LPFN LPFo PVREF VCOF PVSS3 SLCo RFi RFRPi RFEQo VRo RESiN VMDiR TESTR AGCi RFo RVDD3 LDo I/O Pin Description O Request signal output to the USB controller Not used. (Open) O Audio data output to the USB controller O Request signal output to the system controller or USB controller O ST REQ signal output O Not used. (Open) I Gate signal input from the USB controller - Ground - Power supply (+3.3 V) O Subcode block sync signal output to the system controller O Not used. (Open) O Not used. (Open) O Not used. (Open) O Zero detection signal output Not used. (Open) I Not used. (Connected to ground.) I Microcomputer interface mode selection signal input Fixed at "H" in this set. O Digital audio data output Not used in this set. (Open) O Audio data output Not used in this set. (Open) O Bit clock signal output to the USB controller O L/R sampling clock signal output I Digital audio data input from the USB controller I Bit clock signal input from the USB controller I L/R sampling clock signal input from the USB controller - Power supply (+1.5 V) - Ground - Not used. (Open) - Power supply (+3.3 V) O Phase error margin signal between EFM signal and PLCK signal output O TMAX detection signal output Not used. (Open) O TMAX detection signal output I Inverted signal input from the operation amplifier for PLL loop filter O Signal output from the operation amplifier for PLL loop filter I Reference voltage (+1.65 V) input O VCO filter output - Ground O EFM slice level output I RF signal input I RF ripple signal input O EFM slice level output O Reference voltage (+1.65 V) output O External resistor connection pin O Reference voltage (+1.65 V) output for automatic power control circuit O Low-pass filter terminal for RFEQO offset correction I RF signal amplitude adjustment amplification input O RF signal generation amplification output - Power supply (+3.3 V) Laser diode on/off control signal output to the automatic power control circuit O "H": laser diode on 78

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78
HCD-ZUX9
46
AoUT3 (PO4)
O
Request signal output to the USB controller
Not used. (Open)
47
AoUT2 (PO5)
O
Audio data output to the USB controller
48
PIO0
O
Request signal output to the system controller or USB controller
49
PIO1
O
ST REQ signal output
50
PIO2
O
Not used. (Open)
51
PIO3
I
Gate signal input from the USB controller
52
VSS1
—
Ground
53
VDDT3
—
Power supply (+3.3 V)
54
SBSY
O
Subcode block sync signal output to the system controller
55
SBOK/FOK
O
Not used. (Open)
56
IPF
O
Not used. (Open)
57
SFSY/LOCK
O
Not used. (Open)
58
ZDET
O
Zero detection signal output
Not used. (Open)
59
GPIN
I
Not used. (Connected to ground.)
60
MS
I
Microcomputer interface mode selection signal input
Fixed at “H” in this set.
61
DOUT (PO6)
O
Digital audio data output
Not used in this set. (Open)
62
AOUT1 (PO7)
O
Audio data output
Not used in this set. (Open)
63
BCK (PO8)
O
Bit clock signal output to the USB controller
64
LRCK (PO9)
O
L/R sampling clock signal output
65
AIN (PI4)
I
Digital audio data input from the USB controller
66
BCKi (PI5)
I
Bit clock signal input from the USB controller
67
LRCKi (PI6)
I
L/R sampling clock signal input from the USB controller
68
VDD1
—
Power supply (+1.5 V)
69
VSS
—
Ground
70
AWRC
—
Not used. (Open)
71
PVDD3
—
Power supply (+3.3 V)
72
PDO
O
Phase error margin signal between EFM signal and PLCK signal output
73
TMAXS
O
TMAX detection signal output
Not used. (Open)
74
TMAX
O
TMAX detection signal output
75
LPFN
I
Inverted signal input from the operation amplifier for PLL loop filter
76
LPFo
O
Signal output from the operation amplifier for PLL loop filter
77
PVREF
I
Reference voltage (+1.65 V) input
78
VCOF
O
VCO filter output
79
PVSS3
—
Ground
80
SLCo
O
EFM slice level output
81
RFi
I
RF signal input
82
RFRPi
I
RF ripple signal input
83
RFEQo
O
EFM slice level output
84
VRo
O
Reference voltage (+1.65 V) output
85
RESiN
O
External resistor connection pin
86
VMDiR
O
Reference voltage (+1.65 V) output for automatic power control circuit
87
TESTR
O
Low-pass filter terminal for RFEQO offset correction
88
AGCi
I
RF signal amplitude adjustment amplification input
89
RFo
O
RF signal generation amplification output
90
RVDD3
—
Power supply (+3.3 V)
91
LDo
O
Laser diode on/off control signal output to the automatic power control circuit
“H”: laser diode on
Pin No.
Pin Name
I/O
Pin Description