EVGA 132-YW-E179-TR User Guide - Page 79

Award POST Codes, Description

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Code 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 Name Reserved Award POST Codes Description Reserved CheckSum Check Check the integrity of the ROM,BIOS and message Reserved Autodetect EEPROM Check Flash type and copy flash write/erase routines Reserved Test CMOS Test and Reset CMOS Reserved Load Chipset Load Chipset Defaults Reserved Init Clock Initialize onboard clock generator Reserved Init CPU CPU ID and initialize L1/L2 cache Reserved Reserved Setup Interrupt Initialize first 120 interrupt vectors with Vector Table SPURIOUS_INT_HDLR and initialize INT 00h-1Fh according to INT_TBL CMOS Battery Test CMOS and check Battery Fail Check Early PM Early PM initialization Reserved Re-initial KB Load keyboard matrix Reserved HPM init Init Heuristic Power Management (HPM) Reserved Program chipset Early Programming of chipset registers Init PNP Init PNP Shadow VBIOS Shadow system/video BIOS

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Award POST Codes
Code
Name
Description
0C
Reserved
0D
Reserved
0E
CheckSum
Check
Check the integrity of the ROM,BIOS and message
0F
Reserved
10
Autodetect
EEPROM
Check Flash type and copy flash write/erase routines
11
Reserved
12
Test CMOS
Test and Reset CMOS
13
Reserved
14
Load Chipset
Load Chipset Defaults
15
Reserved
16
Init Clock
Initialize onboard clock generator
17
Reserved
18
Init CPU
CPU ID and initialize L1/L2 cache
19
Reserved
1A
Reserved
1B
Setup Interrupt
Vector Table
Initialize first 120 interrupt vectors with
SPURIOUS_INT_HDLR and initialize INT 00h-1Fh
according to INT_TBL
1C
CMOS Battery
Check
Test CMOS and check Battery Fail
1D
Early PM
Early PM initialization
1E
Reserved
1F
Re-initial KB
Load keyboard matrix
20
Reserved
21
HPM init
Init Heuristic Power Management (HPM)
22
Reserved
23
Program
chipset
Early Programming of chipset registers
24
Init PNP
Init PNP
25
Shadow VBIOS
Shadow system/video BIOS