Intel SAI2 Product Specification - Page 15

SAI2 Server Board TPS SAI2 Server Board Architecture Overview 2.2 ServerWorks ServerSet III LE Chipset The ServerWorks ServerSet III LE chipset provides an integrated I/O bridge and memory controller and a flexible I/O subsystem core (PCI), targeted for multiprocessor systems and standard high-volume servers that are based on the Intel Pentium III processor. The ServerWorks ServerSet III LE chipset consists of two components: • CNB30LE North Bridge The CNB30LE North Bridge is responsible for accepting access requests from the host (processor) bus and for directing those accesses to memory or to one of the PCI buses. The CNB30LE North Bridge monitors the host bus, examining addresses for each request. Accesses may be directed to a memory request queue for subsequent forwarding to the memory subsystem, or to an outbound request queue for subsequent forwarding to one of the PCI buses. The CNB30LE North Bridge is responsible for controlling data transfers to and from the memory. The CNB30LE North Bridge provides the interface for both the 64-bit, 66-MHz, Revision 2.2-compliant PCI bus and the 32-bit, 33-MHz, Revision 2.2-compliant PCI bus. The CNB30LE North Bridge is both a master and target on both PCI buses. • CSB5 South Bridge The CSB5 South Bridge controller has several components. It can be both a master and a target on the 32-bit, 33-MHz PCI bus. The CSB5 South Bridge also includes a USB controller and an IDE controller. The CSB5 South Bridge is responsible for many of the power management functions, with Advanced Configuration and Power Interface (ACPI) control registers built in. The CSB5 South Bridge provides a number of Infiniband pins. 2.3 Memory The SAI2 server board contains four 168-pin DIMM sockets. Memory is partitioned as four banks of registered SDRAM DIMMs, each of which provides 72 bits of single interleaved memory (64-bit main memory plus ECC). The SAI2 server board supports up to four 3.3-V, registered ECC SDRAM DIMMs that are compliant with the JEDEC PC133 specification. A wide range of DIMM sizes are supported, including 64 MB, 128 MB, 256 MB, 512 MB, and 1-GB DIMMs. The minimum supported memory configuration is 64 MB using one DIMM. The maximum configurable memory size is 4 GB using four DIMMs. Note: Neither PC100 DIMMs nor non-ECC DIMMs can be used. DIMMs may be installed in one, two, three, or four DIMM slots and must be populated starting with the lowest numbered slot and filling the slots in consecutive order. Empty memory slots between DIMMs are not supported. Although the SAI2 server board architecture allows the user to mix various sizes of DIMMS, Intel recommends that module and DRAM vendors not be mixed in the same server system. Revision 1.0 5