Intel SAI2 Product Specification - Page 53
SAI2 Server Board TPS, Basic Input Output System BIOS, Revision 1.0, Table 31. POST Error Conditions
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SAI2 Server Board TPS Basic Input Output System (BIOS) Code 0B61: 0B62: 0B63: 0B6F: 0B70: 0B71: 0B74: 0B75: 0B7C: 0BB0: 0BB1: 0BD0: 0BD1: 0BD2: N/A N/A N/A N/A N/A N/A 8503: Error Message DIMM #2 has been disabled DIMM #3 has been disabled DIMM #4 has been disabled DIMM with error is enabled The error occurred during temperature sensor reading System temperature out of the range The error occurred during voltage sensor reading System voltage out of the range The error occurred during redundant power module confirmation SMBIOS - SROM data read error SMBIOS - SROM data checksum bad 1st SMBus device address not acknowledged. 1st SMBus device Error detected. 1st SMBus timeout. Expansion ROM not initialized. Invalid System Configuration Data System Configuration Data Read Error Resource Conflict System Configuration Data Write error Warning: IRQ not configured Incorrect memory speed in location: XX, XX, ... Failure Description Memory error, memory group #2 failed Memory error, memory group #3 failed Memory error, memory group #4 failed An error detected in all the memory Error while detecting a temperature failure. Temperature error detected. Error while detecting voltage System voltage error The error occurred while retrieving the power information SROM data read error Bad checksum of SROM data Some SMBus device (chip) failed PCI Expansion ROM card not initialized System configuration data destroyed System configuration data read error PCI card resource is not mapped correctly. System configuration data write error PCI interrupt is not configured correctly. Non-PC133 DIMMs have been installed in slots XX, XX, ... A beep code is a series of individual beeps on the PC speaker, each of equal length. The following table describes the error conditions associated with each beep code and the corresponding POST checkpoint code as seen by a port 80h card. For example, if an error occurs at checkpoint 22h, a beep code of 1-3-1-1 is generated. Table 31. POST Error Conditions and Beep Codes Beeps 1-2-2-3 1-3-1-1 1-3-1-3 1-3-3-1 1-3-4-1 1-3-4-3 1-4-1-1 1-4-3-3 2-1-2-3 2-2-3-1 Error ROM Checksum Error DRAM Refresh Test Error Keyboard Controller Test Error Memory Not Detected Memory Capacity Check Error DRAM Address Test Error DRAM Test low byte Error DRAM Test high byte Error All Memory Group Errors BIOS ROM Copy-Write Test Error Unexpected Interrupt Test Error Cause - - - No memory. Can not write to memory No memory. Can not write to memory Memory address signal failure Memory data signal failure (low) Memory data signal failure (high) - Error with Shadow RAM Unexpected interrupt Recommended Action Change system board Change memory DIMM's Change system board Verify DIMM installation. Change memory DIMM's Verify DIMM installation. Change memory DIMM's Change DIMM or M/B Change DIMM or M/B Change DIMM or M/B - Change system board Change CPU or system board Revision 1.0 43