Intel SAI2 Product Specification - Page 45

SAI2 Server Board TPS, Basic Input Output System BIOS, Revision 1.0

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SAI2 Server Board TPS Basic Input Output System (BIOS) configuration). If user binary code is required at run time, it is copied into and executed from option ROM space (0C8000H - 0E7fffH). At each scan-point during POST, the system BIOS determines if the scan-point has a corresponding user binary entry point to transfer control to the user binary. Presence of a valid entry point in the user binary is determined by examining the bitmap at byte 4 of the user binary header; each entry point has a corresponding "presence" bit in this bitmap. If the bitmap has the appropriate bit set, an entry point ID is placed in the "AL" register and execution is passed to the address computed by (ADR(Byte 5)+5*scan sequence #). During execution, the user binary may access 11 bytes of extended BIOS data area RAM (EBDA). The segment of EBDA can be found at address 40:0e. Offset 18h through offset 22h is available for the user binary. The BIOS also reserves eight CMOS bits for the user binary. These bits are in an unchecksummed region of CMOS with default values of zero, and will always be located in the first bank of CMOS. These bits are contiguous, but are not in a fixed location. Upon entry into the user binary, DX contains a 'token' that points to the reserved bits. This token is of the following format: MSB LSB 15 12 11 0 # of bit available -1 Bit offset from start of CMOS of first bit The most significant four bits are equal to the number of CMOS bits available minus one. This field is equal to seven, since eight CMOS bits are available. The 12 least significant bits define the position of the CMOS bit in the real-time clock (RTC). This is a bit address rather than a byte address. The CMOS byte location is 1/8th of the 12-bit number, and the remainder is the starting bit position within that byte. For example, if the 12-bit number is 0109h, user binary can use bit 1 of CMOS byte 0108h/8 or 021h. It should be noted that the bits available to the user binary may span more than one byte of CMOS (i.e., a value of 07084h indicates that the upper nibble of byte 10h and the lower nibble of byte 11h are reserved for the user binary). The following code fragment shows the header and format for a user binary: db 55h, 0AAh, 20h ; 16KB USER Area MyCode PROC FAR db CBh ; MUST be a FAR procedure ; Far return instruction db 04h db CBh dw ? dw 0 ; Bit map to define call points, a 1 ; in any bit specifies ; that the BIOS is called at that ; scan point in POST ; First transfer address used to ; point to user binary extension ; structure ; Word Pointer to extension ; structure ; Reserved JMP ErrRet JMP ErrRet ; This is a list of 7 transfer ; addresses, one for each ; bit in the bitmap. Revision 1.0 35

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SAI2 Server Board TPS
Basic Input Output System (BIOS)
Revision 1.0
35
configuration). If user binary code is required at run time, it is copied into and executed from
option ROM space (0C8000H – 0E7fffH).
At each scan-point during POST, the system BIOS determines if the scan-point has a
corresponding user binary entry point to transfer control to the user binary. Presence of a valid
entry point in the user binary is determined by examining the bitmap at byte 4 of the user binary
header; each entry point has a corresponding “presence” bit in this bitmap. If the bitmap has the
appropriate bit set, an entry point ID is placed in the “AL” register and execution is passed to
the address computed by (ADR(Byte 5)+5*scan sequence #).
During execution, the user binary may access 11 bytes of extended BIOS data area RAM
(EBDA). The segment of EBDA can be found at address 40:0e. Offset 18h through offset 22h is
available for the user binary. The BIOS also reserves eight CMOS bits for the user binary.
These bits are in an unchecksummed region of CMOS with default values of zero, and will
always be located in the first bank of CMOS. These bits are contiguous, but are not in a fixed
location. Upon entry into the user binary, DX contains a ‘token’ that points to the reserved bits.
This token is of the following format:
MSB
LSB
15
12
11
0
# of bit available –1
Bit offset from start of CMOS of first bit
The most significant four bits are equal to the number of CMOS bits available minus one. This
field is equal to seven, since eight CMOS bits are available. The 12 least significant bits define
the position of the CMOS bit in the real-time clock (RTC). This is a bit address rather than a
byte address. The CMOS byte location is 1/8th of the 12-bit number, and the remainder is the
starting bit position within that byte. For example, if the 12-bit number is 0109h, user binary can
use bit 1 of CMOS byte 0108h/8 or 021h. It should be noted that the bits available to the user
binary may span more than one byte of CMOS (i.e., a value of 07084h indicates that the upper
nibble of byte 10h and the lower nibble of byte 11h are reserved for the user binary).
The following code fragment shows the header and format for a user binary:
db
55h, 0AAh, 20h
; 16KB USER Area
MyCode
PROC
FAR
; MUST be a FAR procedure
db
CBh
; Far return instruction
db
04h
; Bit map to define call points, a 1
; in any bit specifies
; that the BIOS is called at that
; scan point in POST
db
CBh
; First transfer address used to
; point to user binary extension
; structure
dw
?
; Word Pointer to extension
; structure
dw
0
; Reserved
JMP
ErrRet
; This is a list of 7 transfer
; addresses, one for each
JMP
ErrRet
; bit in the bitmap.