LG M6100 Service Manual - Page 14

Technical Brief

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3. TECHNICAL BRIEF 3. TECHNICAL BRIEF 3.1 Power Transceiver (SKY74400, U501) The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a voltage supply part, and a VCTCXO part. The SKY74400 power transceiver is a highly integrated device for quad-band Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), and Enhanced Data for GSM Evolution (EDGE) handsets. The device supports GSM850, EGSM900, DCS1800, and PCS1900 applications. The power transceiver consists of a direct conversion receiver and power amplifier (PA) with an integrated PA Control (iPAC) function, fully integrated into a single module. All RF inputs and outputs of the device are fully matched to 50 . The receiver path implements a direct down-conversion architecture that eliminates the need for Intermediate Frequency(IF) components. Four integrated Low Noise Amplifiers (LNAs) are internally matched to 50 , which eliminates the need for external matching components. The receiver path also contains a quadrature demodulator, selectable receiver baseband filter bandwidths, low droop DCoffset correction sequencer, and integrated 2nd order Intercept Point (IP2) calibration circuitry. The SKY74400 also features an integrated, fully programmable, sigma-delta fractional-N synthesizer suitable for EGPRS multi-slot operation. The reference frequency for the synthesizer is supplied by an integrated Voltage Controlled Crystal Oscillator (VCXO) circuit that enables the use of a low-cost crystal. The VCXO also provides a buffered output to supply other devices in the system. The transmit path uses a translation loop architecture. This architecture consists of an In-phase and Quadrature (I/Q) modulator and a frequency translation loop to perform frequency up-conversion with high spectral purity. The translation loop also contains a phase-frequency detector, charge pump, mixer, programmable dividers, and high power transmit Voltage Controlled Oscillators (VCOs) with no external tank required. The transmit loop is directly connected to the PA section of the power transceiver, which consists of separate GSM850/EGSM900 and DCS1800/PCS1900 blocks fabricated on a single GaAs Heterojunction Bipolar Transistor (HBT) die, impedance matching circuitry for 50 output, and a custom BiCMOS PA control block with an internal current-sense resistor. • Receive section. Includes four integrated LNAs with 50 Ω inputs, quadrature demodulator circuitry that performs direct down-conversion, baseband amplifier circuitry with I/Q outputs, baseband filter with programmable bandwidths, five stages of DC offset correction, and IP2 calibration circuitry. • Synthesizer section. Includes an integrated VCO locked by a fractional-N synthesizer loop, a crystal oscillator to supply the reference frequency, a reference frequency output buffer, and an integrated loop filter. • Transmit section. The transmit section is designed with a translation loop architecture that consists of an I/Q modulator, integrated high power VCOs, offset mixer, programmable divider, Phase/Frequency Detector (PFD), charge pump, and loop filter. The transmit section also includes a PA for GSM850/EGSM900 and DCS1800/PCS1900 operation with common power supply pins, 50Ω output impedance matching circuitry, and a Power Amplifier Controller (PAC) block with an internal current-sense resistor. - 15 -

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3. TECHNICAL BRIEF
- 15 -
3.1 Power Transceiver (SKY74400, U501)
The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a voltage
supply part, and a VCTCXO part.
The SKY74400 power transceiver is a highly integrated device for quad-band Global System for
Mobile Communications (GSM), General Packet Radio Service (GPRS), and Enhanced Data for GSM
Evolution (EDGE) handsets. The device supports GSM850, EGSM900, DCS1800, and PCS1900
applications. The power transceiver consists of a direct conversion receiver and power amplifier (PA)
with an integrated PA Control (iPAC) function, fully integrated into a single module. All RF inputs and
outputs of the device are fully matched to 50 .
The receiver path implements a direct down-conversion architecture that eliminates the need for
Intermediate Frequency(IF) components. Four integrated Low Noise Amplifiers (LNAs) are internally
matched to 50 , which eliminates the need for external matching components. The receiver path also
contains a quadrature demodulator, selectable receiver baseband filter bandwidths, low droop DC-
offset correction sequencer, and integrated 2nd order Intercept Point (IP2) calibration circuitry.
The SKY74400 also features an integrated, fully programmable, sigma-delta fractional-N synthesizer
suitable for EGPRS multi-slot operation. The reference frequency for the synthesizer is supplied by an
integrated Voltage Controlled Crystal Oscillator (VCXO) circuit that enables the use of a low-cost
crystal.
The VCXO also provides a buffered output to supply other devices in the system.
The transmit path uses a translation loop architecture. This architecture consists of an In-phase and
Quadrature (I/Q) modulator and a frequency translation loop to perform frequency up-conversion with
high spectral purity. The translation loop also contains a phase-frequency detector, charge pump,
mixer, programmable dividers, and high power transmit Voltage Controlled Oscillators (VCOs) with no
external tank required. The transmit loop is directly connected to the PA section of the power
transceiver, which consists of separate GSM850/EGSM900 and DCS1800/PCS1900 blocks fabricated
on a single GaAs Heterojunction Bipolar Transistor (HBT) die, impedance matching circuitry for 50
output, and a custom BiCMOS PA control block with an internal current-sense resistor.
• Receive section. Includes four integrated LNAs with 50 Ω inputs, quadrature demodulator circuitry
that performs direct down-conversion, baseband amplifier circuitry with I/Q outputs, baseband filter
with programmable bandwidths, five stages of DC offset correction, and IP2 calibration circuitry.
• Synthesizer section. Includes an integrated VCO locked by a fractional-N synthesizer loop, a crystal
oscillator to supply the reference frequency, a reference frequency output buffer, and an integrated
loop filter.
• Transmit section. The transmit section is designed with a translation loop architecture that consists of
an I/Q modulator, integrated high power VCOs, offset mixer, programmable divider,
Phase/Frequency Detector (PFD), charge pump, and loop filter. The transmit section also includes a
PA for GSM850/EGSM900 and DCS1800/PCS1900 operation with common power supply pins, 50Ω
output impedance matching circuitry, and a Power Amplifier Controller (PAC) block with an internal
current-sense resistor.
3. TECHNICAL BRIEF