LG M6100 Service Manual - Page 24
Control Processor Subsystem, DSP Subsystem, Encoding/Decoding Algorithms, Peripheral Subsystem,
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3. TECHNICAL BRIEF • AD6527 is an ADI designed processor. • AD6527 consists of 1. Control Processor Subsystem • 32-bit ARM7TDMI Control Processor • 58.5 MHz operation at 1.7V • On-board 16KB instruction/Data Cache • 1 Mbits of on-chip System SRAM 2. DSP Subsystem • 16-bit Fixed Point DSP Processor • 91 MIPS at 1.7V • 16K word Data and 16K word Program SRAM • 4K word Program Instruction Cache • Architecture supports Full Rate, Enhanced Full Rate, Half Rate, and AMR Speech Encoding/Decoding Algorithms 3. Peripheral Subsystem • Shared on-chip peripheral and off-chip interface: • Support for Burst and Page Mode Flash • Support for Pseudo SRAM • Ciphering module for GPRS supporting GAE1 and GAE2 encryption algorithms • Parallel and Serial Display Interface • 8 x 8 Keypad Interface • Four independent programmable backlight plus One Service Light • 1.8V and 3.0V, 64 kbps SIM interface • Universal System Connector Interface • Slow, Medium and Fast IrDA transceiver interface • Enhanced Generic Serial Port • Dedicated SPI interface • Thumbwheel Interface • JTAG Interface for Test and In-Circuit Emulation 4. Other • Supports 13 MHz and 26 MHz Input Clocks • 1.8V Typical Core Operating Voltages • 204-Ball LFBGA(mini-BGA) Package 5. Applications • GSM900/DCS1800/PCS1900/PCS850 Wireless Terminals • GSM Phase 2+ Compliant • GPRS Class 12 Compliant • Multimedia Services(MMS) • Extended Messaging System(EMS) - 25 -