Sharp GX20 Service Manual - Page 93

Main Block Diagram 2/2

Page 93 highlights

CONFIDENTIAL GX20 VSIM VCORE VMEM VINT VRTC VDDUSB X102 32kHz CRYSTAL When JTAGEN=H, automaticaly GPIO_18 TCK GPIO_19 TMS GPIO_20 TDI GPIO_21 TDO z) VMC VEXT OSCIN OSCOUT JTAGEN BAND BSPORT VSPORT HSL/ Trace Cipher Coprocessor Viterbi Coprocessor JTAG I/F DSP Subsystem SPORT-0 SPORT-1 PLL IDMA DSP ADSP-218x 78MHz Cache RAM (4k word) PM (16k word) DM (16k word) GPIO_8(Hardware revison monitor[0]) GPIO_16(Hardware revison monitor[1]) GPIO_17(Hardware revison monitor[2]) CA1001 CAMERA UNIT BC 13V -7V nWE,nRD,nDISPLAYCS2, ADD[19:17],ADD[2:1],D[15:0] GPIO_47 GPIO_34 GPO_7 REG7 V-CCD:2.5V Controlled by VMEN IC208 XC6209B252MR Q205 V-INT:3.0V IP part RESET INT VDD2 DSP part CCD sensor V-Driver VDD1 ADD IC206 REG9 TK1131C 3.1V IC207 REG11 R116018B Controlled by VMEM LCD100 MAIN DISPLAY (CGS module) GPIO_39 CAM_CK RESET VDDPLL V-LCD:1.8V VDDCORE em Cache 16k byte S MCU ARM7TDMI MHz CLK & BS GEN DMA and BUS ARBITRATION EBUS PBUS Cipher Engine RBUS 2M RBUS 2M Internal SRAM (2Mbit) Internal SRAM (2Mbit) MI IO LAY TC PAD MC HOUSE-KEEPING System DMA WDT General Timers IRQ-CTRL & RAU COMMS-SYSTEM MicroSM Slow Clocking A-SPORT Synth i/f nRD,nWE,GPO_25(RSP),nWAIT, GPIO_33(LCDINT),DATA[15:0], GPO_10(BUFOFF) IC403 DISPLAY CONTROLLER LR38863 CLKOUT(13MHz) nDISPLAYCS1 SE_D0, SE_LD2, SE_CK VBAT LED (BLUE) LED (GREEN) LED (RED) IC402 IX3053AF POWER MANAGEMENT (BD6010 Rohm) CAMP CAMN CS DISPLAY DRIVER IC LCD001 EXTERNAL DISPLAY VBAT GPIO_4 MAIN DISPLAY BACKLIGHT B C EXTERNAL DISPLAY IC404 LT1937 DC-DC BACKLIGHT GPO_23 M SC RT B1.1 IrDA C/SD Peripheral PLL Peripheral Subsystem ADDRESS & DATA BUS/GPIO(INT) GPO_19 nAUXCS2 nWE,nRD,ADD[1] DATA[7:0], GPIO_15(RESET), GPIO_38(INT) IC103 YMU759B SOUND CS (MA2) CLKOUT(13MHz) SP100 SPEAKER V-INT:3.0V REG13 IC302 NJM2871F03 3.0V VMEM 2.8V 1.8V LEDA REG14 IC203 RQ5RW18B GPIO_8 Q207 SD eGSPa GPIO_1(RXD) GPIO_0(TXD) UN101 INFRARED PORT VBACK 3.0V SRAM 4Mbit(X16) nRAMCS2 SC-RAM 64Mbit(X16) nRAMCS1 nROMCS1,nRAMCS1, nRAMCS2,nGPCS1 ADD[22:1],DATA[15:0] nWE,nRD,nUB,nLB, GPIO_14(WP),nRESET D EQ3 HP_OUT MO100 VIBRATOR GPO_11(E_AMP) IC101 NJM2149R GPIO_3 IC209 SPEAKER AMP. TK11130C REG17 3.0V Bias FLASH2 64Mbit(X16) nGPCS1 FLASH1 64Mbit(X16) nROMCS1 A AUXADC2 IC105 TEMP.SENSOR LM20BIM7 F VT For CAMERA AUXADC5 IC307 TEMP.SENSOR Y V-INT: 3.0V IC106 LRS1B24 4-LEVEL STACK MEMORY LM20BIM7 For BATTERY Figure 2 MAIN BLOCK DIAGRAM (2/2) 4 - 2

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GX20
4 – 2
CONFIDENTIAL
Figure 2
MAIN BLOCK DIAGRAM (2/2)
DSP Subsystem
RT
MI
SC
M
MC
WDT
COMMS-SYSTEM
Synth i/f
CLK
&
BS GEN
S
MHz
PBUS
DMA and BUS
ARBITRATION
RBUS 2M
EBUS
IDMA
PLL
78MHz
DSP
ADSP-218x
SD
RBUS 2M
BSPORT
VSPORT
Peripheral Subsystem
IO
LAY
TC
PAD
em
Internal
SRAM
(2Mbit)
Internal
SRAM
(2Mbit)
HOUSE-KEEPING
System DMA
General Timers
IRQ-CTRL & RAU
MicroSM
Slow Clocking
A-SPORT
VSIM
VCORE
VMEM
VINT
VRTC
VDDUSB
VMC
VEXT
X102
32kHz
CRYSTAL
ADDRESS & DATA BUS/GPIO(INT)
eGSPa
z)
Y
When JTAGEN=H,
automaticaly
GPIO_18
TCK
GPIO_19
TMS
GPIO_20
TDI
GPIO_21
TDO
Cipher
Coprocessor
Viterbi
Coprocessor
HSL/
Trace
OSCIN
OSCOUT
JTAGEN
JTAG I/F
IC106
LRS1B24 4-LEVEL STACK MEMORY
FLASH1
64Mbit(X16)
nROMCS1
FLASH2
64Mbit(X16)
nGPCS1
SC-RAM
64Mbit(X16)
nRAMCS1
SRAM
4Mbit(X16)
nRAMCS2
UN101
INFRARED PORT
LEDA
GPIO_8
GPIO_1(RXD)
GPIO_0(TXD)
nROMCS1,nRAMCS1,
nRAMCS2,nGPCS1
ADD[22:1],DATA[15:0]
nWE,nRD,nUB,nLB,
GPIO_14(WP),nRESET
1.8V
VBACK 3.0V
VMEM 2.8V
V-INT: 3.0V
Cache RAM
(4k word)
PM (16k word)
DM (16k word)
TEMP.SENSOR
LM20BIM7
VT
AUXADC2
TEMP.SENSOR
LM20BIM7
AUXADC5
For CAMERA
For BATTERY
IC203
RQ5RW18B
Q207
IC105
IC209
TK11130C
IC103
YMU759B
SOUND
IC208
XC6209B252MR
Q205
IC101
NJM2149R
SPEAKER AMP.
IC302
NJM2871F03
IC307
BAND
SPORT-1
SPORT-0
REG14
MCU
ARM7TDMI
Cipher
Engine
Cache
16k byte
B1.1
IrDA
C/SD
Peripheral PLL
IC403
DISPLAY CONTROLLER
LR38863
IC207
R116018B
IC206
TK1131C
DISPLAY DRIVER IC
nRD,nWE,GPO_25(RSP),nWAIT,
GPIO_33(LCDINT),DATA[15:0],
GPO_10(BUFOFF)
DSP part
CCD
sensor
nWE,nRD,nDISPLAYCS2,
ADD[19:17],ADD[2:1],D[15:0]
(MA2)
SP100
SPEAKER
VIBRATOR
CLKOUT(13MHz)
V-CCD:2.5V
GPIO_39
REG9
GPO_7
3.1V
REG13
3.0V
RESET
CA1001
CAMERA UNIT
RESET
INT
GPIO_47
GPIO_34
REG7
Controlled by VMEN
VDD1
ADD
VDD2
nDISPLAYCS1
CS
nWE,nRD,ADD[1] DATA[7:0],
GPIO_15(RESET),
GPIO_38(INT)
LCD001
EXTERNAL DISPLAY
V-INT:3.0V
HP_OUT
GPO_11(E_AMP)
CS
VDDCORE
A
IC402
IX3053AF
POWER MANAGEMENT
(BD6010 Rohm)
V-INT:3.0V
SE_D0, SE_LD2,
SE_CK
VDDPLL
REG11
Controlled by VMEM
V-LCD:1.8V
CAM_CK
CAMP
CAMN
B
B
C
C
13V
-7V
MAIN
DISPLAY
BACKLIGHT
EXTERNAL
DISPLAY
BACKLIGHT
LED
(BLUE)
LED
(GREEN)
LED
(RED)
VBAT
V-Driver
nAUXCS2
GPO_19
REG17
GPIO_3
GPIO_8(Hardware revison monitor[0])
GPIO_16(Hardware revison monitor[1])
GPIO_17(Hardware revison monitor[2])
Bias
3.0V
EQ3
D
IC404
LT1937
DC-DC
GPIO_4
VBAT
CLKOUT(13MHz)
IP part
GPO_23
MO100
LCD100
MAIN DISPLAY
(CGS module)
F