Asus P3V133 P3V133 User Manual - Page 56

Chip Configuration

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4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration SDRAM Configuration [By SPD] This sets the optimal timings for items 2-5, depending on the memory modules that you are using. Default setting is [By SPD], which configures items 2-5 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Define] [7ns (143MHz)] [8ns (125MHz)] [By SPD] SDRAM CAS Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. SDRAM RAS Precharge Time This controls the idle clocks after issuing a precharge command to the SDRAM. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. SDRAM RAS to CAS Delay This controls the latency between the SDRAM active command and the read/write command. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. Read Around Write With the Read Around Write (RAW) feature, after the CPU issues a write command, the memory controller stores the write data in its buffer so that next time the CPU needs the data, it can provide them without accessing the SDRAM. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. 56 ASUS P3V133 User's Manual

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ASUS P3V133 User’s Manual
56
4.
BIOS SETUP
4.
BIOS SETUP
Chip Configuration
SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–5, depending on the memory mod-
ules that you are using. Default setting is [By SPD], which configures items
2–5 by reading the contents in the SPD (Serial Presence Detect) device. The
EEPROM on the memory module stores critical parameter information about
the module, such as memory type, size, speed, voltage interface, and mod-
ule banks. Configuration options: [User Define] [7ns (143MHz)] [8ns
(125MHz)] [By SPD]
SDRAM CAS Latency
This controls the latency between the SDRAM read command and the time
that the data actually becomes available.
NOTE:
To make changes to this
field, the
SDRAM Configuration
field must be set to [User Define].
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to the
SDRAM.
NOTE:
To make changes to this field, the
SDRAM Configura-
tion
field must be set to [User Define].
SDRAM RAS to CAS Delay
This controls the latency between the SDRAM active command and the
read/write command.
NOTE:
To make changes to this field, the
SDRAM
Configuration
field must be set to [User Define].
Read Around Write
With the Read Around Write (RAW) feature, after the CPU issues a write
command, the memory controller stores the write data in its buffer so that
next time the CPU needs the data, it can provide them without accessing the
SDRAM.
NOTE:
To make changes to this field, the
SDRAM Configura-
tion
field must be set to [User Define].
4.4.1 Chip Configuration