Biostar M7VKG M7VKG user's manual - Page 50

Bank Interleave, System BIOS Cacheable, Video RAM Cacheable, K7 CLK_CTL Select, The Choices: Disabled

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Chapter2 BIOS Setup Bank Interleave This item allows you to enable or disable the bank interleave feature. The Choices: Disabled (default), 2Bank,4Bank. System BIOS Cacheable When enabled, accesses to system BIOS ROM addressed at F0000H-FFFFFH are cached, provided that the cache controller is enabled. The Choices: Enabled, Disabled (default). Video RAM Cacheable Select Enabled allows caching of the video BIOS, resulting in better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Disabled (default), Enabled. K7 CLK_CTL Select Use this item to specify the clock control for ramp rate. Select default for a defaulted time value, and optimum time value which depends on different CPU ratio. The Choices: Default (default), Optimal. 2-16

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Chapter2
BIOS Setup
2-16
Bank Interleave
This item allows you to enable or disable the bank interleave feature.
The Choices: Disabled
(default)
,
2Bank,4Bank.
System BIOS Cacheable
When enabled, accesses to system BIOS ROM addressed at
F0000H-FFFFFH are cached, provided that the cache controller is enabled.
The Choices:
Enabled,
Disabled
(default).
Video RAM Cacheable
Select Enabled allows caching of the video BIOS, resulting in better system
performance. However, if any program writes to this memory area, a system error
may result.
The Choices: Disabled
(default)
,
Enabled.
K7 CLK_CTL Select
Use this item to specify the clock control for ramp rate. Select default for a
defaulted time value, and optimum time value which depends on different CPU
ratio.
The Choices: Default
(default), Optimal.