Campbell Scientific CR1000KD CR1000 Measurement and Control System - Page 315
High-frequency Pulse P1 - P2, 1.5.1.2 Low-Level ac P1 - P2, 1.5.1.3 Switch Closure P1 - P2
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Section 8. Operation 8.1.5.1.1 High-frequency Pulse (P1 - P2) High-frequency pulse inputs are routed to an inverting CMOS input buffer with input hysteresis. The CMOS input buffer is an output zero level with its input ≥ 2.2 V, and an output one level with its input ≤ 0.9 V. When a pulse channel is configured for high-frequency pulse, an internal 100-kΩ pull-up resistor to 5 Vdc on the P1 or P2 input is automatically employed. This pull-up resistor accommodates open-collector (open-drain) output devices for high-frequency input. 8.1.5.1.2 Low-Level ac (P1 - P2) Rotating magnetic-pickup sensors commonly generate ac output voltages ranging from thousandths of Volts at low rotational speeds to several volts at high rotational speeds. Pulse channels contain internal signal-conditioning hardware for measuring low-level ac-output sensors. When configured for low-level ac, P1 through P2 measure signals ranging from 20-mV RMS (±28 mV peak) to 14-V RMS (±20 V peak). Internal ac coupling is incorporated in the low-level ac hardware to eliminate dc offset voltages of up to ±0.5 Vdc. 8.1.5.1.3 Switch Closure (P1 - P2) Switch-closure mode measures switch closure events, such as occur with a common tipping bucket rain gage. An internal 100-kΩ pull-up resistor pulls an input to 5 Vdc with the switch open, whereas a switch closure to ground pulls the input to 0 V. An internal 3.3-ms time-constant RC-debounce filter eliminates multiple counts from a single switch closure event. 8.1.5.2 Pulse Input on Digital I/O Channels C1 - C8 Digital I/O channels C1 - C8 can be used to measure pulse inputs between -8.0 and +16 Vdc. Low frequency mode ( +16 Vdc is to be measured. Under no circumstances should voltages greater than ±50 V be connected to channels C1 - C8. 315