HP Workstation x1000 hp workstation x1000 - technical reference guide - Page 70

system bus

Page 70 highlights

system board system bus Figure 2-14 system bus The system bus of the Pentium 4 processor is implemented in the Advanced Gunning Transceiver Logic (AGTL)+ technology. This technology features open-drain signal drivers that are pulled up through resistors at bus extremities to the operating voltage of the processor core. These resistors also act as bus terminators and are integrated in the processor and in the 82845 MCH. The System Bus Socket 478 Intel Pentium 4 Processor Address (32) Control Data (64) 1.5V AGP Connector AGP 4x Bus (1.06GB/sec at 133MHz data transfer rate) 845 Memory Controller Hub (MCH) 82845 Single Channel SDRAM Bus (1.0GB/s at 133MHz data transfer rate) HUB LINK 8 (266MB/s data transfer rate) I/O Controller Hub 100MHz two-way system bus (data bus runs at 4 x 100MHz, 3.2GB/s transfer rate) 3 onboard DIMM sockets supporting SDRAM memory The supported operating frequency of the AGTL+ bus for the Pentium 4 is 100MHz. The width of the data bus is 64 bits, whereas the width of the address is 32 bits. Data bus transfers occur at four times the system bus, at 400MHz. Along with the operating frequencies, the processor voltage is set automatically. The control signals of the system bus allow the implementation of a "split -transaction" bus protocol. This allows the Pentium 4 processor to send 70 Chapter 2

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system board
system bus
Chapter 2
70
system bus
The system bus of the Pentium 4 processor is implemented in the
Advanced
Gunning
Transceiver
Logic
(AGTL)+
technology.
This
technology features open-drain signal drivers that are pulled up through
resistors at bus extremities to the operating voltage of the processor core.
These resistors also act as bus terminators and are integrated in the
processor and in the 82845 MCH.
Figure 2-14
The System Bus
The supported operating frequency of the AGTL+ bus for the Pentium 4
is 100MHz. The width of the data bus is 64 bits, whereas the width of the
address is 32 bits. Data bus transfers occur at four times the system bus,
at 400MHz. Along with the operating frequencies, the processor voltage
is set automatically.
The control signals of the system bus allow the implementation of a “split
-transaction” bus protocol. This allows the Pentium 4 processor to send
845
Memory
Controller Hub
(MCH)
82845
1.5V
AGP
Connector
I/O Controller
Hub
Single Channel
SDRAM Bus
Address (32)
Control
Data (64)
AGP 4x Bus
(1.06GB/sec at
133MHz data
transfer rate)
Socket 478
100MHz two-way sys-
tem bus (data bus runs at
4 x 100MHz, 3.2GB/s
transfer rate)
HUB LINK 8
(266MB/s
data transfer
rate)
(1.0GB/s at
133MHz data
transfer rate)
3 onboard DIMM
sockets supporting
SDRAM memory
Intel Pentium 4
Processor