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Hitachi HTS541010G9AT00 Specifications - Page 69

S.M.A.R.T. Function

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10.7.1 Performance Idle Mode This mode is usually entered immediately after Active mode command processing is complete, instead of conventional idle mode. In Performance Idle mode, all electronic components remain powered and full frequency servo remains operational. This provides instantaneous response to the next command. The duration of this mode is intelligently managed as described below. 10.7.2 Active Idle Mode In this mode, power consumption is 45-55% less than that of Performance Idle mode. Additional electronics are powered off and the head is parked near the mid-diameter of the disk without servoing. Recovery time to Active mode is about 20 ms. 10.7.3 Low Power Idle Mode Power consumption is 60-65% less than that of Performance Idle mode. The heads are unloaded on the ramp but the spindle is still rotated at the full speed. Recovery time to Active mode is about 300 ms. 10.7.4 Transition time The transition time is dynamically managed by the user's recent access pattern, instead of fixed times. The ABLE-3 algorithm monitors the interval between commands instead of the command frequency of ABLE-2. The algorithm supposes that the next command will come with the same command interval distribution as the previous access pattern. The algorithm calculates the expected average saving energy and response delay for next command in several transition time case based on this assumption. And it selects the most effective transition time with the condition that the calculated response delay is shorter than the value calculated from the specified level by Set Feature Enable Advanced Power Management command. The optimal time to enter Active Idle mode is variable depending on the recent behavior of the user. It is not possible to achieve the same level of Power savings with a fixed entry time into Active Idle because every user's data and access pattern is different. The optimum entry time changes over time. The same algorithm works for entering into Low Power Idle mode and Standby mode, which consumes less power but needs more recovery time switching from this mode to Active mode. 10.8 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition. By alerting the host system of a negative reliability status condition, the host system can warn the user of the impending risk of a data loss and advise the user of appropriate action. Since S.M.A.R.T. utilizes the internal device microprocessor and other device resources, there may be some small overhead associated with its operation. However, special care has been taken in the design of the S.M.A.R.T. algorithms to minimize the impact to host system performance. Actual impact of S.M.A.R.T. overhead is dependent on the specific device design and the usage patterns of the host system. To further ensure minimal impact to the user, S.M.A.R.T. capable devices are shipped from the device manufacturer's factory with the S.M.A.R.T. feature disabled. S.M.A.R.T. capable devices can be enabled by the system OEMs at time of system integration or in the field by after-market products. Travelstar 5K100 (Serial ATA) Hard Disk Drive Specification 57

Section	Page
1.0 General	13
1.1 Introduction	13
1.2 References	13
1.3 Abbreviations	13
1.4 Caution	15
2.0 General features of the drive	17
3.0 Fixed-disk subsystem description	21
3.1 Control electronics	21
3.2 Head disk assembly	21
4.0 Drive characteristics	23
4.1 Formatted capacity	23
4.2 Data sheet	24
4.3 Drive organization	25
4.3.1 Drive format	25
4.3.2 Cylinder allocation	26
4.4 Performance characteristics	28
4.4.1 Command overhead	28
4.4.2 Mechanical positioning	28
4.4.3 Drive ready time	30
4.4.4 Operating modes	30
5.0 Data integrity	33
5.1 Data loss at power off	33
5.2 Write Cache	33
5.3 Equipment status	33
5.4 WRITE safety	34
5.5 Data buffer test	34
5.6 Error recovery	34
5.7 Automatic reallocation	34
5.8 ECC	35
6.0 Specification	37
6.1 Environment	37
6.1.1 Temperature and humidity	37
6.1.2 Corrosion test	38
6.2 Radiation noise	38
6.3 Conductive noise	39
6.4 Magnetic fields	39
6.5 DC power requirements	39
6.5.1 Power consumption efficiency	40
6.6 Reliability	41
6.6.1 Data integrity	41
6.6.2 Cable noise interference	41
6.6.3 Service life and usage condition	41
6.6.4 Preventive maintenance	41
6.6.5 Load/Unload	41
6.7 Emergency unload	42
6.7.1 Required power-off sequence	42
6.8 Mechanical specifications	43
6.8.1 Physical dimensions and weight	43
6.8.2 Mounting hole locations	43
6.8.3 Connector and jumper description	44
6.8.4 Drive mounting	44
6.8.5 Load/unload mechanism	44
6.9 Vibration and shock	44
6.9.1 Operating vibration	44
6.9.2 Nonoperating vibration	45
6.9.3 Operating shock	45
6.9.4 Nonoperating shock	46
6.10 Acoustics	46
6.10.1 Discrete tone penalty	47
6.11 Identification labels	47
6.12 Safety	47
6.12.1 UL and CSA approval	47
6.12.2 German safety mark	47
6.12.3 Flammability	47
6.12.4 Safe handling	48
6.12.5 Environment	48
6.12.6 Secondary circuit protection	48
6.13 Electromagnetic compatibility	48
6.13.1 CE mark	48
6.13.2 C-TICK mark	48
6.13.3 BSMI mark	49
6.14 Packaging	49
7.0 Electrical interface specification	51
7.1 Cabling	51
7.2 Interface connector	51
7.3 Signal definitions	52
8.0 General	55
8.1 Introduction	55
8.2 Deviations from standard	55
9.0 Registers	57
9.1 Register naming convention	57
9.2 Command Register	57
9.3 Device Control Register	58
9.4 Device Register	58
9.5 Error Register	59
9.6 Features Regsiter	59
9.7 LBA High Register	59
9.8 LBA Low Register	60
9.9 LBA Mid Register	60
9.10 Sector Count Register	60
9.11 Status Register	60
10.0 General operation descriptions	63
10.1 Reset response	63
10.2 Register initialization	64
10.3 Diagnostic and Reset considerations	64
10.4 Power-off considerations	65
10.4.1 Emergency unload	65
10.4.2 Required power-off sequence	65
10.5 Sector Addressing Mode	65
10.5.1 Logical CHS Addressing Mode	66
10.5.2 LBA Addressing Mode	66
10.6 Power management features	66
10.6.1 Power mode	67
10.6.2 Power management commands	67
10.6.3 Standby/Sleep command completion time	67
10.6.4 Standby timer	67
10.6.5 Status	67
10.6.6 Interface capability for power modes	68
10.6.7 Initial Power Mode at Power On	68
10.7 Advanced Power Management (ABLE-3) feature	68
10.7.1 Performance Idle Mode	69
10.7.2 Active Idle Mode	69
10.7.3 Low Power Idle Mode	69
10.7.4 Transition time	69
10.8 S.M.A.R.T. Function	69
10.8.1 Attributes	70
10.8.2 Attribute values	70
10.8.3 Attribute thresholds	70
10.8.4 Threshold exceeded condition	70
10.8.5 S.M.A.R.T. commands	70
10.8.6 S.M.A.R.T. operation with power management modes	70
10.9 Security Mode Feature Set	70
10.9.1 Security mode	71
10.9.2 Security level	71
10.9.3 Password	71
10.9.4 Master Password Revision Code	71
10.9.5 Command table	75
10.10 Protected Area Function	76
10.10.1 Example for operation (In LBA Mode)	76
10.10.2 Set Max security extension commands	77
10.11 Seek Overlap	78
10.12 Write Cache function	79
10.13 Reassign Function	79
10.13.1 Auto Reassign Function	80
10.14 48-bit Address Feature Set	81
10.15 Software Setting Preservation Feature Set	81
10.15.1 Preserved software settings	82
11.0 Command protocol	83
11.1 Data In commands	83
11.2 Data Out Commands	84
11.3 Non-data commands	85
11.4 DMA data in commands	85
12.0 Command descriptions	87
12.1 Check Power Mode (E5h/98h)	91
12.2 Device Configuration Overlay (B1h)	92
12.2.1 DEVICE CONFIGURATION RESTORE (subcommand C0h)	92
12.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h)	92
12.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h)	93
12.2.4 DEVICE CONFIGURATION SET (subcommand C3h)	93
12.3 Execute Device Diagnostic (90h)	96
12.4 Flush Cache (E7h)	97
12.5 Flush Cache EXT (EAh)	98
12.6 Format Track (50h: vendor specific)	99
12.7 Format Unit (F7h: vendor specific)	100
12.8 Identify Device (ECh)	101
12.9 Idle (E3h/97h)	111
12.10 Idle Immediate (E1h/95h)	112
12.11 Initialize Device Parameters (91h)	113
12.12 Read Buffer (E4h)	114
12.13 Read DMA (C8h/C9h)	115
12.14 Read DMA EXT (25h)	117
12.15 Read Log Ext (2Fh)	119
12.15.1 General purpose log Directory	120
12.15.2 Extended comprehensive SMART error log	121
12.15.3 Error Log version	121
12.15.4 Extended Self-test log sector	123
12.16 Read Long (22h/23h)	125
12.17 Read Multiple (C4h)	127
12.18 Read Multiple EXT (29h)	129
12.19 Read Native Max ADDRESS (F8h)	130
12.20 Read Native Max ADDRESS EXT (27h)	131
12.21 Read Sectors (20h/21h)	132
12.22 Read Sector(s) EXT (24h)	133
12.23 Read Verify Sectors (40h/41h)	135
12.24 Ready Verify Sector(s) EXT (42h)	137
12.25 Recalibrate (1xh)	139
12.26 Security Disable Password (F6h)	140
12.27 Security Erase Unit (F3h)	141
12.28 Security Freeze Lock (F5h)	143
12.29 Security Set Password (F1h)	144
12.30 Security Unlock (F2h)	146
12.31 Seek (7xh)	147
12.32 Sense Condition (F0h: vendor specific)	148
12.33 Set Features (EFh)	149
12.34 Set Max ADDRESS (F9h)	151
12.35 Set Max ADDRESS EXT (37h)	153
12.36 Set Multiple (C6h)	155
12.37 Sleep (E6h/99h)	156
12.38 S.M.A.R.T. Function Set (B0h)	157
12.38.1 S.M.A.R.T. Function Subcommands	158
12.38.2 Device Attribute Data Structure	163
12.38.3 Device Attribute Thresholds data structure	168
12.38.4 S.M.A.R.T Log Directory	169
12.38.5 S.M.A.R.T. error log sector	170
12.38.6 Self-test log data structure	172
12.38.7 Selective self-test log data structure	172
12.38.8 Error reporting	174
12.39 Standby (E2h/96h)	175
12.40 Standby Immediate (E0h/94h)	176
12.41 Write Buffer (E8h)	177
12.42 Write DMA (CAh/CBh)	178
12.43 Write DMA EXT (35h)	180
12.44 Write Log Ext (3Fh)	182
12.45 Write Long (32h/33h)	183
12.46 Write Multiple (C5h)	185
12.47 Write Multiple EXT (39h)	186
12.48 Write Sectors (30h/31h)	188
12.49 Write Sectors(s) EXT (34h)	190
12.50 Write Verify (3Ch: vendor specific)	191
13.0 Timings	193
14.0 Appendix	195
14.1 Commands Support Coverage	195
14.2 SET FEATURES Commands Support Coverage	197

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Travelstar 5K100 (Serial ATA) Hard Disk Drive Specification

10.7.1

Performance Idle Mode

This mode is usually entered immediately after Active mode command processing is complete, instead of

conventional idle mode. In Performance Idle mode, all electronic components remain powered and full frequency

servo remains operational. This provides instantaneous response to the next command. The duration of this mode is

intelligently managed as described below.

10.7.2

Active Idle Mode

In this mode, power consumption is 45–55% less than that of Performance Idle mode. Additional electronics are

powered off and the head is parked near the mid-diameter of the disk without servoing. Recovery time to Active

mode is about 20 ms.

10.7.3

Low Power Idle Mode

Power consumption is 60–65% less than that of Performance Idle mode. The heads are unloaded on the ramp but

the spindle is still rotated at the full speed. Recovery time to Active mode is about 300 ms.

10.7.4

Transition time

The transition time is dynamically managed by the user's recent access pattern, instead of fixed times. The ABLE-3

algorithm monitors the interval between commands instead of the command frequency of ABLE-2. The algorithm

supposes that the next command will come with the same command interval distribution as the previous access

pattern. The algorithm calculates the expected average saving energy and response delay for next command in

several transition time case based on this assumption. And it selects the most effective transition time with the

condition that the calculated response delay is shorter than the value calculated from the specified level by Set

Feature Enable Advanced Power Management command.

The optimal time to enter Active Idle mode is variable depending on the recent behavior of the user. It is not possible

to achieve the same level of Power savings with a fixed entry time into Active Idle because every user's data and

access pattern is different. The optimum entry time changes over time.

The same algorithm works for entering into Low Power Idle mode and Standby mode, which consumes less power

but needs more recovery time switching from this mode to Active mode.

10.8

S.M.A.R.T. Function

The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent

unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By

monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated

data analysis algorithms to predict the likelihood of near-term degradation or fault condition. By alerting the host

system of a negative reliability status condition, the host system can warn the user of the impending risk of a data

loss and advise the user of appropriate action.

Since S.M.A.R.T. utilizes the internal device microprocessor and other device resources, there may be some small

overhead associated with its operation. However, special care has been taken in the design of the S.M.A.R.T.

algorithms to minimize the impact to host system performance. Actual impact of S.M.A.R.T. overhead is dependent

on the specific device design and the usage patterns of the host system. To further ensure minimal impact to the user,

S.M.A.R.T. capable devices are shipped from the device manufacturer's factory with the S.M.A.R.T. feature

disabled. S.M.A.R.T. capable devices can be enabled by the system OEMs at time of system integration or in the

field by after-market products.