Home » Intel Manuals » Processors » Intel E2180 » Manual Viewer

Intel E2180 Design Guide - Page 67

Critical Parameters for Interfacing to Reference Clip, 9. Critical Core Dimension

UPC - 683728169121

Add to My Manuals
Save this manual to your list of manuals

Page 67 highlights

ATX Thermal/Mechanical Design Information Figure 6-8. Critical Parameters for Interfacing to Reference Clip Fan Fin Array Core See Detail A Clip Fin Array Clip 1.6 mm Core Detail A Figure 6-9. Critical Core Dimension 1.00 +/- 0.10 mm 1.00 mm min Φ38.68 +/- 0.30 mm Φ36.14 +/- 0.10 mm Gap required to avoid core surface blemish during clip assembly. Recommend 0.3 mm min. Core R 0.40 mm max R 0.40 mm max 2.596 +/- 0.10 mm NOTE: Dimension from the bottom of the clip to the bottom of the heatsink core (or base) should be met to enable the required load from the heatsink clip (i.e., 43 lbf nominal +/- 10 lbf) § Thermal and Mechanical Design Guidelines 67

Section	Page
1 Introduction	11
1.1 Document Goals and Scope	11
1.1.1 Importance of Thermal Management	11
1.1.2 Document Goals	11
1.1.3 Document Scope	12
1.2 References	13
1.3 Definition of Terms	13
2 Processor Thermal/Mechanical Information	15
2.1 Mechanical Requirements	15
2.1.1 Processor Package	15
2.1.2 Heatsink Attach	17
2.1.2.1 General Guidelines	17
2.1.2.2 Heatsink Clip Load Requirement	17
2.1.2.3 Additional Guidelines	18
2.2 Thermal Requirements	18
2.2.1 Processor Case Temperature	18
2.2.2 Thermal Profile	19
2.2.3 TCONTROL	20
2.3 Heatsink Design Considerations	21
2.3.1 Heatsink Size	22
2.3.2 Heatsink Mass	22
2.3.3 Package IHS Flatness	23
2.3.4 Thermal Interface Material	23
2.4 System Thermal Solution Considerations	24
2.4.1 Chassis Thermal Design Capabilities	24
2.4.2 Improving Chassis Thermal Performance	24
2.4.3 Summary	25
2.5 System Integration Considerations	25
3 Thermal Metrology	27
3.1 Characterizing Cooling Performance Requirements	27
3.1.1 Example	28
3.2 Processor Thermal Solution Performance Assessment	29
3.3 Local Ambient Temperature Measurement Guidelines	29
3.4 Processor Case Temperature Measurement Guidelines	32
4 Thermal Management Logic and Thermal Monitor Feature	33
4.1 Processor Power Dissipation	33
4.2 Thermal Monitor Implementation	33
4.2.1 PROCHOT# Signal	34
4.2.2 Thermal Control Circuit	34
4.2.2.1 Thermal Monitor	34
4.2.3 Thermal Monitor 2	35
4.2.4 Operation and Configuration	36
4.2.5 On-Demand Mode	37
4.2.6 System Considerations	37
4.2.7 Operating System and Application Software Considerations	38
4.2.8 THERMTRIP# Signal	38
4.2.9 Cooling System Failure Warning	38
4.2.10 Digital Thermal Sensor	38
4.2.11 Platform Environmental Control Interface (PECI)	39
5 Balanced Technology Extended (BTX) Thermal/Mechanical Design Information	41
5.1 Overview of the Balanced Technology Extended (BTX) Reference Design	41
5.1.1 Target Heatsink Performance	41
5.1.2 Acoustics	42
5.1.3 Effective Fan Curve	44
5.1.4 Voltage Regulator Thermal Management	45
5.1.5 Altitude	46
5.1.6 Reference Heatsink Thermal Validation	46
5.2 Environmental Reliability Testing	46
5.2.1 Structural Reliability Testing	46
5.2.1.1 Random Vibration Test Procedure	47
5.2.1.2 Shock Test Procedure	47
5.2.2 Power Cycling	49
5.2.3 Recommended BIOS/CPU/Memory Test Procedures	49
5.3 Material and Recycling Requirements	49
5.4 Safety Requirements	50
5.5 Geometric Envelope for Intel Reference BTX Thermal Module Assembly	50
5.6 Preload and TMA Stiffness	51
5.6.1 Structural Design Strategy	51
5.6.2 TMA Preload versus Stiffness	51
6 ATX Thermal/Mechanical Design Information	55
6.1 ATX Reference Design Requirements	55
6.2 Validation Results for Reference Design	58
6.2.1 Heatsink Performance	58
6.2.2 Acoustics	59
6.2.3 Altitude	60
6.2.4 Heatsink Thermal Validation	60
6.3 Environmental Reliability Testing	61
6.3.1 Structural Reliability Testing	61
6.3.1.1 Random Vibration Test Procedure	61
6.3.1.2 Shock Test Procedure	61
6.3.2 Power Cycling	63
6.3.3 Recommended BIOS/CPU/Memory Test Procedures	63
6.4 Material and Recycling Requirements	63
6.5 Safety Requirements	64
6.6 Geometric Envelope for Intel Reference ATX Thermal Mechanical Design	64
6.7 Reference Attach Mechanism	65
6.7.1 Structural Design Strategy	65
6.7.2 Mechanical Interface to the Reference Attach Mechanism	66
7 Intel® Quiet System Technology (Intel® QST)	69
7.1 Intel® QST Algorithm	69
7.1.1 Output Weighting Matrix	70
7.1.2 Proportional-Integral-Derivative (PID)	70
7.2 Board and System Implementation of Intel® QST	72
7.3 Intel® QST Configuration and Tuning	74