Intel S5500WB12V Product Specification - Page 116

Glossary Intel® Server Board S5500WB TPS Term QPI RAM RASUM RISC ROM RTC RMM3 SDR SECC SEEPROM SEL SIO SMBUS SMI SMM SMS SNMP TBD TDP TIM UART UDP UHCI URS UTC UUID VID VRD VT Word ZIF QuickPath Interconnect Definition Random Access Memory Reliability, Availability, Serviceability, Usability, and Manageability Reduced Instruction Set Computing Read Only Memory Real-Time Clock (Component of ICH peripheral chip on the server board) Remote Management Module 3 Sensor Data Record Single Edge Connector Cartridge Serial Electrically Erasable Programmable Read-Only Memory System Event Log Server Input / Output System Management BUS Server Management Interrupt (SMI is the highest priority nonmaskable interrupt) Server Management Mode Server Management Software Simple Network Management Protocol To Be Determined Thermal Design Power Thermal Interface Material Universal Asynchronous Receiver/Transmitter User Datagram Protocol Universal Host Controller Interface Unified Retention System Universal time coordinate Universally Unique Identifier Voltage Identification Voltage Regulator Down Virtualization Technology 16-bit quantity Zero Insertion Force 102 Revision 1.9 Intel order number E53971-008