Intel S5500WB12V Product Specification - Page 29

Intel® Server Board S5500WB TPS Functional Architecture 3.3 Processor Subsystem The Intel® 5500 series and the next generation Intel® 5600 series processors support the following key technologies:  Intel® Integrated Memory Controller  Point-to-point link interface based on the Intel® QuickPath Interconnect (Intel® QPI), which was formerly known as the Common System Interface (CSI). The Intel® 5500 series processor is a multi-core processor based on the 45 nm process technology. Processor features vary by SKU and include up to two Intel® QPI point-to-point links capable of up to 6.4 GT/s, up to 8 MB of shared cache, and an integrated memory controller. The Intel® 5600 series processor is the next generation of multi-core processors based on the 32 nm process technology. Processor features vary by SKU and include up to 6 cores and up to 12 MB of shared cache. 3.3.1 Processor Support The Intel® Server Board S5500WB supports the following processors:  One or two Intel® 5500 series or 5600 series processor(s) in FC-LGA 1366 socket B package with 4.8 GT/s, 5.86 GT/s, or 6.4 GT/s Intel® QPI.  Up to 95 W Thermal Design Power (TDP).  Supports Low Voltage (LV) processors. 3.3.2 Processor Population Rules For optimum performance, when two processors are installed, both must be the identical revision and have the same core voltage and Intel® QPI/core speed. When only one processor is installed, it must be in the socket labeled CPU1. The other socket must be empty. You must populate processors in sequential order. Therefore, you must populate processor socket 1 (CPU1) before processor socket 2 (CPU2). When a single processor is installed, no terminator is required in the second processor socket. 3.3.2.1 Mixed Processor Configurations The following table describes mixed processor conditions and recommended actions for all Intel® server boards and systems that use the Intel® 5500 Chipset. The errors fall into one of the following two categories:  Fatal: If the system can boot, it goes directly to the error manager, regardless of whether the Post Error Pause setup option is enabled or disabled.  Major: If the Post Error Pause setup option is enabled, the system goes directly to the error manager. Otherwise, the system continues to boot and no prompt is given for the error. The error is logged to the error manager. Revision 1.9 15 Intel order number E53971-008