Intel S5500WB12V Product Specification - Page 45

Intel® Server Board S5500WB TPS Functional Architecture 3.8.1 MAC Address Definition The Intel® Server Board S5500WB has the following four MAC addresses assigned to it at the Intel factory.  NIC 1 MAC address  NIC 2 MAC address - Assigned the NIC 1 MAC address +1  Integrated BMC LAN Channel MAC address - Assigned the NIC 1 MAC address +2  Intel® Remote Management Module 3 (Intel® RMM3) MAC address - Assigned the NIC 1 MAC address +3 The Intel® Server Board S5500WB has a white MAC address sticker included with the board. The sticker displays the NIC 1 MAC address in both bar code and alphanumeric formats. 3.8.2 LAN Connector Ordering The Intel® 82576 NIC is connected to a stacked RJ-45 over USB mag-jack for NIC 1 and a RJ45 mag-jack for the second connection (NIC 2). 3.9 Integrated Baseboard Management Controller The ServerEngines* LLC Pilot II Integrated BMC is provided by an embedded ARM9 controller and associated peripheral functionality that is required for IPMI-based server management. Firmware usage of these hardware features is platform-dependant. The following is a summary of the Integrated BMC management hardware features used by the ServerEngines* LLC Pilot II Integrated BMC:  IPMI 2.0 Compliant  Integrated 250 MHz 32-bit ARM9 processor  Six I2C SMBus modules with Master-Slave support  Two independent 10/100 Ethernet Controllers with RMII support  Six I2C interface  Memory Management Unit (MMU)  DDR2 16-bit up to 667 MHz memory interface  Up to 16 direct and 64 Serial GPIO ports  12 10-bit Analog to Digital Converters  Eight Fan Tachometers Inputs  Four Pulse Width Modulators (PWM)  Chassis Intrusion Logic with battery-backed general purpose register  JTAG Master interface  Watchdog timer Additionally, the ServerEngines* Pilot II part integrates a super I/O module with the following features:  Keyboard Style/BT Interface Revision 1.9 31 Intel order number E53971-008