AMD AMD-K6-2/450 Design Guide - Page 10
EPM 16-Byte I/O Block Definition Low-Power Model D55 - k6 2
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Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide 23913A/0-November 2000 Table 18. Processor-to-Bus Clock Ratios (Model Standard-Power D 35 Table 19. Model-Specific Registers Supported by Model 9 38 Table 20. Extended Feature Enable Register (EFER) Definition (Models 9 and D 39 Table 21. Tag versus Data Selector 42 Table 22. Model-Specific Registers Supported by Model D 45 Table 23. Processor-to-Bus Clock Ratios (Low-Power Model D) . . . 47 Table 24. Tag versus Data Selector (same as Table 21 51 Table 25. Enhanced Power Management Register (EPMR) Definition (Low-Power Model D 54 Table 26. EPM 16-Byte I/O Block Definition (Low-Power Model D) 55 Table 27. Bus Divisor and Voltage ID Control (BVC) Definition (Low-Power Model D 56 Table 28. CPUID Functions in AMD-K6™ Processors 60 Table 29. Processor Signatures for AMD-K6™ Processors 62 Table 30. Standard and Extended Feature Bits 63 Table 31. Standard Feature Flag Descriptions 74 Table 32. Extended Feature Flag Descriptions 76 Table 33. EBX Format Returned by Function 8000_0005h 78 Table 34. ECX Format Returned by Function 8000_0005h 78 Table 35. EDX Format Returned by Function 8000_0005h 78 Table 36. ECX Format Returned by Function 8000_0006h 79 Table 37. EDX Format Returned by Function 8000_0007h 79 Table 38. Associativity Values for L2 Cache 80 Table 39. CPUID Values Returned by AMD-K6™ Processors . . . . 81 x List of Tables