Hitachi 7K320 Specifications - Page 113

14.17.3.2 Self-test descriptor index 7K320 (SATA) OEM Specification This indicates the most recent self-test descriptor. If there have been no self-tests, this is set to zero. Valid values for the Self-test descriptor index are 0 to 18. 14.17.3.3 Extended Self-test log descriptor entry The content of the self-test descriptor entry is shown below. Description Self-test number Self-test execution status Power-on life timestamp in hours Self-test failure check point Failing LBA (7:0) Failing LBA (15:8) Failing LBA (23:16) Failing LBA (31:24) Failing LBA (39:32) Failing LBA (47:40) Vendor specific Table 81 Extended Self-test log descriptor entry Bytes 1 1 2 1 1 1 1 1 1 1 15 26 Offset 00h 01h 02h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 14.17.4 Command Error The following table defines the format of the Command Error data structure. Byte 7 6 5 4 3 2 1 0 0 NQ Rsv Rsv TAG 1 Reserved 2 Status 3 Error 4 LBA Low 5 LBA Mid 6 LBA High 7 Device 8 LBA Low Previous 9 LBA Mid Previous 10 LBA High Previous 11 Reserved 12 Sector Count 13 Sector Count Previous 14 - 255 Reserved 256 - 510 Vendor Unique 511 Data Structure Checksum Table 82 Command Error information The TAG field (Byte 0 bits 4-0) contains the tag number corresponding to a queued command, if the NQ bit is cleared. The NQ field (Byte 0 bit 7) indicates whether the error condition was a result of a non-queued or not. If it is cleared, the error information corresponds to a queued command specified by the tag number indicated in the TAG field. The bytes 1 to 13 correspond to the contents of Shadow Register Block when the error was reported. Page 113 of 176