Hitachi 7K320 Specifications - Page 71

DMA Data Transfer Commands, First-parity DMA Commands

Page 71 highlights

 Write Uncorrectable Ext Execution of these commands involves no data transfer. 7K320 (SATA) OEM Specification 13.4 DMA Data Transfer Commands These commands are:  Read DMA  Read DMA Ext  Write DMA  Write DMA Ext Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands except that the host initializes the slave-DMA channel prior to issuing the command. The DMA protocol allows high performance multi-tasking operating systems to eliminate processor overhead associated with PIO transfers. Refer Functional Specification part for further details. 13.5 First-parity DMA Commands These commands are:  Read FPDMA Queued  Write FPDMA Queued Execution of this class of commands includes command queuing and the transfer of one or more blocks of data between the device and the host. The protocol is described in the section 11.14 "FPDMA Queued command protocol" of "Serial ATA revision 2.6". Page 71 of 176

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7K320 (SATA) OEM Specification
Page 71 of 176
Write Uncorrectable Ext
Execution of these commands involves no data transfer.
13.4
DMA Data Transfer Commands
These commands are:
Read DMA
Read DMA Ext
Write DMA
Write DMA Ext
Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands
except that the host initializes the slave-DMA channel prior to issuing the command.
The DMA protocol allows high performance multi-tasking operating systems to eliminate processor
overhead associated with PIO transfers.
Refer Functional Specification part for further details.
13.5
First-parity DMA Commands
These commands are:
Read FPDMA Queued
Write FPDMA Queued
Execution of this class of commands includes command queuing and the transfer of one or more
blocks of data between the device and the host.
The protocol is described in the section 11.14
“FPDMA Queued command protocol” of “Serial ATA revision 2.6”.