Intel BX80580Q9400 User Manual - Page 31

Thermal Management, System Features and Operation

Page 31 highlights

Development Board Features The following features of AMI* BIOS are enabled in the development board: • DDR2 or DDR3 SDRAM detection, configuration, and initialization • Intel® GS45 Express Chipset configuration • POST codes displayed to port 80h • PCI/PCI Express* device enumeration and configuration • Integrated video configuration and initialization • Super I/O configuration • Active Management Technology • RAID 0/1 Support 3.5 Thermal Management The objective of thermal management is to ensure that the temperature of each component is maintained within specified functional limits. The functional temperature limit is the range within which the electrical circuits can be expected to meet their specified performance requirements. Operation outside the functional limit can degrade system performance and cause reliability problems. The development kit is shipped with a heatsink thermal solution for installation on the processor. This thermal solution has been tested in an open-air environment at room temperature and is sufficient for development purposes. The designer must ensure that adequate thermal management is provided for if the system is used in other environments or enclosures. 3.6 System Features and Operation The following sections provide a detailed view of the system features and operation of the development board. 3.6.1 Processor Support The Fern Hill board includes either an Intel® Core™ 2 Duo processor SL9400 at 1.86 GHz core frequency and 6 MB L2 cache, or an Intel® Core™ 2 Duo processor SU9400 at 1.4 GHz core frequency and 3 MB L2 cache. The processor is in a 956-ball MicroFCBGA (Flip Chip Ball Grid Array) package at board location U2E1. Note: The Intel® Core™ 2 Duo SU9400 processor at 1.4 GHz core frequency is not on the Intel embedded roadmap offering and as such does not have embedded market 7 year availability. The Intel® Core™ 2 Duo SU9300 processor at 1.2 GHz core frequency is on the Intel embedded roadmap offering and has embedded market 7 year availability. Development Kit User's Manual 31

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84

Development Board Features
Development Kit User’s Manual
31
The following features of AMI* BIOS are enabled in the development board:
DDR2 or DDR3 SDRAM detection, configuration, and initialization
Intel
®
GS45 Express Chipset configuration
POST codes displayed to port 80h
PCI/PCI Express* device enumeration and configuration
Integrated video configuration and initialization
Super I/O configuration
Active Management Technology
RAID 0/1 Support
3.5
Thermal Management
The objective of thermal management is to ensure that the temperature of each
component is maintained within specified functional limits. The functional temperature
limit is the range within which the electrical circuits can be expected to meet their
specified performance requirements. Operation outside the functional limit can
degrade system performance and cause reliability problems.
The development kit is shipped with a heatsink thermal solution for installation on the
processor. This thermal solution has been tested in an open-air environment at room
temperature and is sufficient for development purposes. The designer must ensure
that adequate thermal management is provided for if the system is used in other
environments or enclosures.
3.6
System Features and Operation
The following sections provide a detailed view of the system features and operation of
the development board.
3.6.1
Processor Support
The Fern Hill board includes either an Intel® Core™ 2 Duo processor SL9400 at 1.86
GHz core frequency and 6 MB L2 cache, or an Intel® Core™ 2 Duo processor SU9400
at 1.4 GHz core frequency and 3 MB L2 cache.
The processor is in a 956-ball Micro-
FCBGA (Flip Chip Ball Grid Array) package at board location U2E1.
Note:
The Intel® Core™ 2 Duo SU9400 processor at 1.4 GHz core frequency is not on the
Intel embedded roadmap offering and as such does not have embedded market 7
year availability.
The Intel® Core™ 2 Duo SU9300 processor at 1.2 GHz core
frequency is on the Intel embedded roadmap offering and has embedded market 7
year availability.