MSI H67MS User Guide - Page 45

Chapter 3 MS-7680 ▶ tRP This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. ▶ tRAS This setting determines the time RAS takes to read from and write to memory cell. ▶ tRFC This setting determines the time RFC takes to read from and write to a memory cell. ▶ tWR Minimum time interval between end of write data burst and the start of a precharge command. Allows sense amplifiers to restore data to cells. ▶ tWTR Minimum time interval between the end of write data burst and the start of a column-read command. It allows I/O gating to overdrive sense amplifiers before read command starts. ▶ tRRD Specifies the active-to-active delay of different banks. ▶ tRTP Time interval between a read and a precharge command. ▶ tFAW This item is used to set the tFAW (four activate window delay) timing. ▶ tWCL This item is used to set the tWCL (Write CAS Latency) timing. ▶ tCKE This item is used to set the tCKE timing. ▶ Advanced Channel 1/ 2 Timing Configuration Press to enter the sub-menu. And you can set the advanced memory timing for each channel. ▶ tRRDR/ tRRDD/ tWWDR/ tWWDD/ tRWDRDD/ tWRDRDD/ tRWSR These items is used to set the memory timings for memory channel 1/ 2. 3-9