Dell OptiPlex 5055 A Series Small Form Factor OptiPlex 5055 Small Form Factor - Page 50

Memory Errors, Active State Power Management

Page 50 highlights

Figure 3. Curved edge Memory Errors Memory errors on the system display the new ON-FLASH-FLASH or ON-FLASH-ON failure code. If all memory fails, the LCD does not turn on. Troubleshoot for possible memory failure by trying known good memory modules in the memory connectors on the bottom of the system or under the keyboard, as in some portable systems. Active State Power Management This section describes about the Active State Power Management (ASPM). ASPM is the power management capability of hardware to effectively reduce usage of power by placing the PCI Express(PCIe) based serial link devices to low-power state when not in use. ASPM is controlled by BIOS or the power management component of the operating system in two configurations. • Disabled: PCIe devices operate on high-performance mode. • L1 Mode: Bi-directional setting of the serially linked PCIe device to low-power state. NOTE: This mode provides with higher power saving at expense of latency when re-establishing the connection. The PCIe bus must be woken up from low-power mode to re-establish the connection with the device. This accounts for the latency, which is also referred to as ASPM exit latency. 50 Technology and components

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Figure 3. Curved edge
Memory Errors
Memory errors on the system display the new ON-FLASH-FLASH or ON-FLASH-ON failure code. If all memory fails, the LCD does not
turn on. Troubleshoot for possible memory failure by trying known good memory modules in the memory connectors on the bottom of the
system or under the keyboard, as in some portable systems.
Active State Power Management
This section describes about the Active State Power Management (ASPM).
ASPM
is the power management capability of hardware to
effectively
reduce usage of power by placing the PCI Express(PCIe) based
serial link devices to low-power state when not in use.
ASPM is controlled by BIOS or the power management component of the operating system in two
configurations.
Disabled: PCIe devices operate on high-performance mode.
L1 Mode: Bi-directional setting of the serially linked PCIe device to low-power state.
NOTE:
This mode provides with higher power saving at expense of latency when re-establishing the connection.
The PCIe bus must be woken up from low-power mode to re-establish the connection with the device. This accounts for the latency, which
is also referred to as ASPM exit latency.
50
Technology and components