Epson Apex 386/33 Canadian Product User Manual - Page 143

Cache Organization, Direct-Mapped Cache, bit locations and caches 16MB of main memory. The cache index

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Cache Organization - Direct-Mapped Cache The direct-mapped cache memory is an alternative to associativecache memory, which uses a single address comparator for the memory system and standard RAM cells for the address and data cells. The direct-mapped cache is based on an idea borrowed from software called hash coding. This is a method for simulating an associative memory. In the hash coding approach, the memory address space is divided into a number of sets of words with the goal of each set having no more than one word of most-frequently-used data. Each direct-mapped cache address has two parts. The first part, called the cache index field, contains enough bits to specify a block location within the cache. The second field, called the tag field, contains enough bits to distinguish one block from other blocks that may be stored at a particular location. For example, consider a 64KB direct-mapped cache that contains 16K 32-bit locations and caches 16MB of main memory. The cache index field must include 14 bits to select one 16K block in the cache, plus 2 bits to select a byte from the 4-byte sub-block. The tag field must be 8 bits wide to identify one of the 256 blocks that can occupy the selected cache location. Therefore, the system requires 64KB of cache RAM (16K 4-byte sub-blocks) to hold the data and code and 16K of 8 bit RAM to hold the tag. The direct-mapped cache organization is shown as follows. 24 Chapter 6: Appendix

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Cache Organization
— Direct-Mapped Cache
The direct-mapped cache memory is an alternative to associative-
cache memory, which uses a single address comparator for the
memory system and standard RAM cells for the address and data
cells. The direct-mapped cache is based on an idea borrowed from
software called hash coding.
This is a method for simulating an associative memory. In the hash
coding approach, the memory address space is divided into a number
of sets of words with the goal of each set having no more than one word
of most-frequently-used data.
Each direct-mapped cache address has two parts. The first part, called
the cache index field, contains enough bits to specify a block location
within the cache. The second field, called the tag field, contains enough
bits to distinguish one block from other blocks that may be stored at a
particular location.
For example, consider a 64KB direct-mapped cache that contains 16K
32-bit locations and caches 16MB of main memory. The cache index
field must include 14 bits to select one 16K block in the cache, plus 2
bits to select a byte from the 4-byte sub-block. The tag field must be 8
bits wide to identify one of the 256 blocks that can occupy the selected
cache location. Therefore, the system requires 64KB of cache RAM
(16K 4-byte sub-blocks) to hold the data and code and 16K of 8 bit
RAM to hold the tag. The direct-mapped cache organization is shown
as follows.
24
Chapter 6: Appendix