Hitachi DK23EA Specifications - Page 90
DIOR- / DIOW- Negated Pulse Width
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Figure 6-7 Multi-word DMA Data Transfer Timing(Mode 2) CS0-/CS1DMARQ DMACKDIOR-/DIOWWrite Data Valid *3 Read Data Valid *3 tM t0 tI tD tL tK tGw tH tGr tF tE tN tJ tZ *3 Data Consists DD(15:0) SYMBOL Description t0 Cycle Time tD DIOR- /DIOW- Pulse Width tE DIOR- Data Access tF DIOR- Data Hold tGr DIOR- Data Setup tGw DIOW- Data Setup tH DIOW- Data Hold tI DMACK to DIOR- / DIOW- Setup tJ DIOR- / DIOW- to DMACK Hold tK DIOR- / DIOW- Negated Pulse Width tL DIOR- / DIOW- to DMARQ Delay tM CS(1:0) valid to DIOR-/DIOW- tN CS(1:0) hold tZ DMACK- to tristate MIN(ns) 120 70 5 20 20 10 0 5 25 25 25 MAX(ns) 50 35 25 K6602637 Rev.3 02.27.01 - 90 -
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K6602637
Rev.3
02.27.01
- 90 -
Figure 6-7
Multi-word DMA Data Transfer Timing(Mode 2)
*3
Data Consists DD(15:0)
SYMBOL
Description
MIN(ns)
MAX(ns)
t
0
Cycle Time
120
t
D
DIOR- /DIOW- Pulse Width
70
t
E
DIOR- Data Access
50
t
F
DIOR- Data Hold
5
t
Gr
DIOR- Data Setup
20
t
Gw
DIOW- Data Setup
20
t
H
DIOW- Data Hold
10
t
I
DMACK to DIOR- / DIOW- Setup
0
t
J
DIOR- / DIOW- to DMACK Hold
5
t
K
DIOR- / DIOW- Negated Pulse Width
25
t
L
DIOR- / DIOW- to DMARQ Delay
35
t
M
CS(1:0) valid to DIOR-/DIOW-
25
t
N
CS(1:0) hold
25
t
Z
DMACK- to tristate
25
t
M
t
0
t
L
t
I
t
D
t
K
t
J
t
Gw
t
Gr
t
H
t
F
DMARQ
DMACK-
DIOR-/DIOW-
Write Data Valid *3
Read Data Valid *3
CS0-/CS1-
t
N
t
E
t
Z