Hitachi DK23EA Specifications - Page 99

Host terminating an Ultra DMA Write

Get Hitachi DK23EA - Travelstar Series 30 GB Hard Drive PDF manuals and user guides View all Hitachi DK23EA manuals
Add to My Manuals
Save this manual to your list of manuals

Page 99 highlights

DMARQ (device) DMACK(host) STOP (host) DDMARDY(device) Figure 6-16 Host terminating an Ultra DMA Write tLI tMLI tSS tLI tACK tLI tIORDYZ HSTROBE (host) DD(15:0) (host) DA0, DA1, DA2, CS0-, CS1- tACK tCVS tCVH CRC tACK Note: The definitions for the STOP, DDMARDY and HSTROBE signal lines are no longer in effect after DMARQ and DMACK are negated. Mode 0(ns) Mode 1(ns) Mode 2(ns) Mode 3(ns) Mode 4(ns) Mode5(ns) Description SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX tCVS 70 48 31 20 6.7 10 CRC word valid setup time at sender tCVH 6.2 6.2 6.2 6.2 6.2 10 CRC word valid hold time at sender tLI 0 150 0 150 0 150 0 100 0 100 0 75 Limited interlock time tMLI 20 20 20 20 20 20 Interlock time with minimum tAZ 10 10 10 10 10 10 Maximum time allowed for output drivers to release tIORDYZ 20 20 20 20 20 20 Maximum time before releasing IORDY tACK 20 20 20 20 20 20 Setup and hold times for DMACK_ tSS 50 50 50 50 50 50 Time from STROBE edge to negation of DMARQ or assertion of STOP K6602637 Rev.3 02.27.01 - 99 -

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
K6602637
Rev.3
02.27.01
- 99 -
Figure 6-16 Host terminating an Ultra DMA Write
DMARQ
(device)
DMACK-
(host)
STOP
(host)
DDMARDY-
(device)
HSTROBE
(host)
DD(15:0)
(host)
DA0, DA1, DA2,
CS0-, CS1-
t
ACK
t
LI
t
MLI
t
CVS
t
LI
t
LI
t
ACK
t
IORDYZ
t
ACK
CRC
t
CVH
t
SS
Note:
The definitions for the STOP, DDMARDY and HSTROBE signal lines are no longer in effect
after DMARQ and DMACK are negated.
Mode 0(ns) Mode 1(ns) Mode 2(ns) Mode 3(ns) Mode 4(ns)
Mode5(ns)
Description
SYMBOL
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
MIN
MAX
t
CVS
70
48
31
20
6.7
10
CRC word valid setup time
at sender
t
CVH
6.2
6.2
6.2
6.2
6.2
10
CRC word valid hold time at
sender
t
LI
0
150
0
150
0
150
0
100
0
100
0
75
Limited interlock time
t
MLI
20
20
20
20
20
20
Interlock time with minimum
t
AZ
10
10
10
10
10
10
Maximum time allowed for
output drivers to release
t
IORDYZ
20
20
20
20
20
20
Maximum
time
before
releasing IORDY
t
ACK
20
20
20
20
20
20
Setup and hold times for
DMACK_
t
SS
50
50
50
50
50
50
Time from STROBE edge
to negation of DMARQ or
assertion of STOP