Intel E5472 Data Sheet - Page 23
FSB Signal Groups Sheet 2 of 2
UPC - 735858200684
View all Intel E5472 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 23 highlights
Quad-Core Intel® Xeon® Processor 5400 Series Electrical Specifications Table 2-6. FSB Signal Groups (Sheet 2 of 2) Signal Group CMOS Asynchronous Output FSB Clock TAP Input TAP Output Power/Other Type Asynchronous Clock Synchronous to TCK Synchronous to TCK Power/Other Signals1 BSEL[2:0], VID[6:1] BCLK[1:0] TCK, TDI, TMS, TRST# TDO COMP[3:0], GTLREF_ADD_MID, GTLREF_ADD_END, GTLREF_DATA_MID, GTLREF_DATA_END, LL_ID[1:0], MS_ID[1:0], PECI, RESERVED, SKTOCC#, TESTIN1, TESTIN2, TESTHI[12:10], VCC, VCC_DIE_SENSE, VCC_DIE_SENSE2, VCCPLL, VID_SELECT, VSS_DIE_SENSE, VSS_DIE_SENSE2, VSS, VTT, VTT_OUT, VTT_SEL Table 2-7. Notes: 1. Refer to Chapter 5 for signal descriptions. 2. These signals may be driven simultaneously by multiple agents (Wired-OR). Table 2-7 outlines the signals which include on-die termination (RTT). Table 2-8 outlines non AGTL+ signals including open drain signals. Table 2-9 provides signal reference voltages. AGTL+ Signal Description Table AGTL+ signals with RTT AGTL+ signals with no RTT A[37:3]#, ADS#, ADSTB[1:0]#, AP[1:0]#, BINIT#, BNR#, BPRI#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#, DP[3:0]#, DRDY#, DSTBN[3:0]#, DSTBP[3:0]#, HIT#, HITM#, LOCK#, MCERR#, REQ[4:0]#, RS[2:0]#, RSP#, TRDY# BPM[5:0]#,BPMb[3:0]#, RESET#, BR[1:0]# Table 2-8. Non AGTL+ Signal Description Table Signals with RTT FORCEPR#1, PROCHOT#2 Signals with no RTT A20M#, BCLK[1:0], BSEL[2:0], COMP[3:0], FERR#/PBE#, GTLREF_ADD_MID, GTLREF_ADD_END, GTLREF_DATA_MID, GTLREF_DATA_END, IERR#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, LL_ID[1:0], MS_ID[1:0], PECI, PWRGOOD, SKTOCC#, SMI#, STPCLK#, TCK, TDI, TDO, TESTHI[12:8], THERMTRIP#, TMS, TRDY#, TRST#, VCC_DIE_SENSE, VCC_DIE_SENSE2, VID[6:1], VID_SELECT, VSS_DIE_SENSE, VSS_DIE_SENSE2, VTT_SEL Notes: 1. These signals have RTT in the package with a 80 Ω pullup to VTT. 2. These signals have RTT in the package with a 50 Ω pullup to VTT. Table 2-9. Signal Reference Voltages GTLREF CMOS A[37:3]#, ADS#, ADSTB[1:0]#, AP[1:0]#, BINIT#, BNR#, BPM[5:0]#, BPMb[3:0]#, BPRI#, BR[1:0]#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#, DP[3:0]#, DRDY#, DSTBN[3:0]#, DSTBP[3:0]#, FORCEPR#, HIT#, HITM#, LOCK#, MCERR#, RESET#, REQ[4:0]#, RS[2:0]#, RSP#, TRDY# A20M#, LINT0/INTR, LINT1/NMI, IGNNE#, INIT#, PWRGOOD, SMI#, STPCLK#, TCK, TDI, TMS, TRST# 23