Intel E5472 Data Sheet - Page 30

Quad-Core Intel® Xeon® Processor 5400 Series Electrical Specifications

30

3.

The voltage specification requirements are measured across the VCC_DIE_SENSE and VSS_DIE_SENSE

lands and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands with an oscilloscope set to 100 MHz

bandwidth, 1.5 pF maximum probe capacitance, and 1 M

Ω

minimum impedance. The maximum length of

ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled

in the scope probe.

4.

The processor must not be subjected to any static V

CC

level that exceeds the V

CC_MAX

associated with any

particular current. Failure to adhere to this specification can shorten processor lifetime.

5.

I

CC_MAX

specification is based on maximum V

CC

loadline. Refer to

Figure 2-7

,

Figure 2-8

,

Figure 2-9

and

Figure 2-10

for details. The processor is capable of drawing I

CC_MAX

for up to 10 ms. Refer to

Figure 2-1

for

further details on the average processor current draw over various time durations.

6.

FMB is the flexible motherboard guideline. These guidelines are for estimation purposes only. See

Section 2.13.1

for further details on FMB guidelines.

7.

This specification represents the total current for GTLREF_DATA_MID, GTLREF_DATA_END,

GTLREF_ADD_MID, and GTLREF_ADD_END.

8.

V

TT

must be provided via a separate voltage source and must not be connected to V

CC

. This specification is

measured at the land.

9.

Minimum V

CC

and maximum I

CC

are specified at the maximum processor case temperature (TCASE) shown

in

Figure 6-2

and

Figure 6-3

.

10.

This specification refers to the total reduction of the load line due to VID transitions below the specified

VID.

11.

Individual processor VID values may be calibrated during manufacturing such that two devices at the same

frequency may have different VID settings.

12.

This specification applies to the VCCPLL land.

13.

Baseboard bandwidth is limited to 20 MHz.

14.

I

CC_TDC

is the sustained (DC equivalent) current that the processor is capable of drawing indefinitely and

should be used for the voltage regulator temperature assessment. The voltage regulator is responsible for

monitoring its temperature and asserting the necessary signal to inform the processor of a thermal

excursion. Please see the applicable design guidelines for further details. The processor is capable of

drawing I

CC_TDC

indefinitely. Refer to

Figure 2-1

for further details on the average processor current draw

over various time durations. This parameter is based on design characterization and is not tested.

15.

This is the maximum total current drawn from the V

TT

plane by only one processor with R

TT

enabled. This

specification does not include the current coming from on-board termination (R

TT

), through the signal line.

Refer to the appropriate platform design guide and the Voltage Regulator Design Guidelines to determine

the total I

TT

drawn by the system. This parameter is based on design characterization and is not tested.

16.

I

CC

_

VTT

_

OUT

is specified at 1.1 V.

17.

I

CC_RESET

is specified while PWRGOOD and RESET# are asserted.

18.

The Quad-Core Intel® Xeon® Processor X5482 is intended for dual processor workstations only.

.

Notes:

1.

Processor or Voltage Regulator thermal protection circuitry should not trip for load currents greater than

I

CC_TDC

.

2.

Not 100% tested. Specified by design characterization.

Figure 2-2.

Quad-Core Intel® Xeon® Processor X5482 Load Current versus Time

12 0

12 5

13 0

13 5

14 0

14 5

15 0

15 5

16 0

0.01

0.1

1

10

10 0

10 0 0

Time Duration (s)

Sustained Current (A)

Section	Page
Quad-Core Intel® Xeon® Processor 5400 Series	1
1 Introduction	9
1.1 Terminology	10
1.2 State of Data	13
1.3 References	13
2 Quad-Core Intel® Xeon® Processor 5400 Series Electrical Specifications	15
2.1 Front Side Bus and GTLREF	15
2.2 Power and Ground Lands	16
2.3 Decoupling Guidelines	16
2.3.1 VCC Decoupling	16
2.3.2 VTT Decoupling	16
2.3.3 Front Side Bus AGTL+ Decoupling	16
2.4 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking	17
2.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0])	17
2.4.2 PLL Power Supply	18
2.5 Voltage Identification (VID)	18
2.6 Reserved, Unused, and Test Signals	21
2.7 Front Side Bus Signal Groups	22
2.8 CMOS Asynchronous and Open Drain Asynchronous Signals	24
2.9 Test Access Port (TAP) Connection	24
2.10 Platform Environmental Control Interface (PECI) DC Specifications	24
2.10.1 DC Characteristics	24
2.10.2 Input Device Hysteresis	25
2.11 Mixing Processors	26
2.12 Absolute Maximum and Minimum Ratings	26
2.13 Processor DC Specifications	27
2.13.1 Flexible Motherboard Guidelines (FMB)	27
2.13.2 VCC Overshoot Specification	38
2.13.3 Die Voltage Validation	39
2.14 AGTL+ FSB Specifications	39
3 Mechanical Specifications	43
3.1 Package Mechanical Drawings	43
3.2 Processor Component Keepout Zones	47
3.3 Package Loading Specifications	47
3.4 Package Handling Guidelines	48
3.5 Package Insertion Specifications	48
3.6 Processor Mass Specifications	48
3.7 Processor Materials	48
3.8 Processor Markings	48
3.9 Processor Land Coordinates	49
4 Land Listing	51
4.1 Quad-Core Intel® Xeon® Processor 5400 Series Pin Assignments	51
4.1.1 Land Listing by Land Name	51
4.1.2 Land Listing by Land Number	61
5 Signal Definitions	71
5.1 Signal Definitions	71
6 Thermal Specifications	79
6.1 Package Thermal Specifications	79
6.1.1 Thermal Specifications	79
6.1.2 Thermal Metrology	90
6.2 Processor Thermal Features	90
6.2.1 Intel® Thermal Monitor Features	90
6.2.2 On-Demand Mode	92
6.2.3 PROCHOT# Signal	93
6.2.4 FORCEPR# Signal	93
6.2.5 THERMTRIP# Signal	94
6.3 Platform Environment Control Interface (PECI)	94
6.3.1 Introduction	94
6.3.2 PECI Specifications	96
7 Features	97
7.1 Power-On Configuration Options	97
7.2 Clock Control and Low Power States	97
7.2.1 Normal State	98
7.2.2 HALT or Extended HALT State	98
7.2.3 Stop-Grant State	100
7.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State	101
7.3 Enhanced Intel SpeedStep® Technology	101
8 Boxed Processor Specifications	103
8.1 Introduction	103
8.2 Mechanical Specifications	105
8.2.1 Boxed Processor Heat Sink Dimensions (CEK)	105
8.2.2 Boxed Processor Heat Sink Weight	113
8.2.3 Boxed Processor Retention Mechanism and Heat Sink Support (CEK)	113
8.3 Electrical Requirements	113
8.3.1 Fan Power Supply (Active CEK)	113
8.3.2 Boxed Processor Cooling Requirements	114
8.4 Boxed Processor Contents	115
9 Debug Tools Specifications	117
9.1 Debug Port System Requirements	117
9.2 Target System Implementation	117
9.2.1 System Implementation	117
9.3 Logic Analyzer Interface (LAI)	117
9.3.1 Mechanical Considerations	118

Intel E5472 Data Sheet - Page 30

Quad-Core Intel® Xeon® Processor X5482 Load Current versus Time

Page 30 highlights