Panasonic BT-4LH310 Parts List - Page 89
Ref No.8500, Series, FPGA3A Bank 0
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1 2 3 4 5 A B C FPGA3A_DDR_MA[12] FPGA3A_DDR_MA[11] FPGA3A_DDR_MA[10] FPGA3A_DDR_MA[9] CLK_396M_FPGA3A_DDR3_FAB_P CLK_396M_FPGA3A_DDR3_FAB_N FPGA3A_DDR_MA[8] FPGA3A_DDR_MA[7] FPGA3A_DDR_MA[6] FPGA3A_DDR_MA[5] FPGA3A_DDR_MA[4] L4 L4 L4 L4 24:D4/24:I4 24:D4/24:I4 L4 L4 L4 L4 L4 L4 FPGA3A_DDR_MA[3] L4 FPGA3A_DDR_MA[2] L4 FPGA3A_DDR_MA[1] L4 FPGA3A_DDR_MA[0] L7 FPGA3A_DDR_MBA[2] L6 FPGA3A_DDR_MBA[1] L6 FPGA3A_DDR_MBA[0] L6 FPGA3A_DDR_MRASB L7 FPGA3A_DDR_MCASB L6 FPGA3A_DDR_MWRB L6 FPGA3A_DDR_MCSB M3 CLK_133M_F3A_P M3 CLK_133M_F3A_N N2 SUBCLK_72M_SYS_F3A L6 FPGA3A_DDR_MCKE L6 FPGA3A_DDR_MODT D E R8538 100 - +1R5V_FPGA3A IC8400 R8510 100 BANK-33(HP) U9 IO_0_VRN_33 V11 IO_L1P_T0_33 W11 IO_L1N_T0_33 V8 IO_L2P_T0_33 V7 IO_L2N_T0_33 W10 IO_L3P_T0_DQS_33 W9 IO_L3N_T0_DQS_33 Y8 IO_L4P_T0_33 Y7 IO_L4N_T0_33 Y11 IO_L5P_T0_33 Y10 IO_L5N_T0_33 V9 IO_L6P_T0_33 W8 IO_L6N_T0_VREF_33 AE7 IO_L7P_T1_33 AF7 IO_L7N_T1_33 AA8 IO_L8P_T1_33 AA7 IO_L8N_T1_33 AC8 IO_L9P_T1_DQS_33 AD8 IO_L9N_T1_DQS_33 AB7 IO_L10P_T1_33 AC7 IO_L10N_T1_33 AA9 IO_L11P_T1_SRCC_33 AB9 IO_L11N_T1_SRCC_33 AC9 IO_L12P_T1_MRCC_33 AD9 IO_L12N_T1_MRCC_33 AB11 IO_L13P_T2_MRCC_33 AC11 IO_L13N_T2_MRCC_33 AA10 IO_L14P_T2_SRCC_33 AB10 IO_L14N_T2_SRCC_33 AB12 IO_L15P_T2_DQS_33 AC12 IO_L15N_T2_DQS_33 AA13 IO_L16P_T2_33 AA12 IO_L16N_T2_33 AC13 IO_L17P_T2_33 AD13 IO_L17N_T2_33 Y13 IO_L18P_T2_33 Y12 IO_L18N_T2_33 AD11 IO_L19P_T3_33 AE11 IO_L19N_T3_VREF_33 AD10 IO_L20P_T3_33 AE10 IO_L20N_T3_33 AE12 IO_L21P_T3_DQS_33 AF12 IO_L21N_T3_DQS_33 AE8 IO_L22P_T3_33 AF8 IO_L22N_T3_33 AE13 IO_L23P_T3_33 AF13 IO_L23N_T3_33 AF10 IO_L24P_T3_33 AF9 IO_L24N_T3_33 V12 IO_25_VRP_33 R8508 4.7k R8511 100 6 7 8 9 10 11 12 FPGA3A_DDR_A_MD[0] FPGA3A_DDR_A_MD[1] FPGA3A_DDR_A_MD[2] FPGA3A_DDR_A_MD[3] FPGA3A_DDRA_MDQS[0] FPGA3A_DDRA_MDQSB[0] FPGA3A_DDR_A_MD[4] FPGA3A_DDR_A_MD[5] FPGA3A_DDR_A_MD[6] FPGA3A_DDR_A_MD[7] FPGA3A_DDR_MRST_N 24:B3 24:B3 24:B3 24:B3 L7 L7 24:B3 24:B3 24:B3 24:B3 L7 FPGA3A_DDR_A_MD[8] FPGA3A_DDR_A_MD[9] FPGA3A_DDR_A_MD[10] FPGA3A_DDR_A_MD[11] FPGA3A_DDRA_MDQS[1] FPGA3A_DDRA_MDQSB[1] FPGA3A_DDR_A_MD[12] FPGA3A_DDR_A_MD[13] FPGA3A_DDR_A_MD[14] FPGA3A_DDR_A_MD[15] 24:B3 24:B3 24:B3 24:B3 L7 L7 24:B3 24:B3 24:B3 24:B3 FPGA3A_DDR_B_MD[0] FPGA3A_DDR_B_MD[1] FPGA3A_DDRB_MDQS[0] FPGA3A_DDRB_MDQSB[0] FPGA3A_DDR_B_MD[2] FPGA3A_DDR_B_MD[3] FPGA3A_DDR_B_MD[4] FPGA3A_DDR_B_MD[5] FPGA3A_DDR_B_MD[6] FPGA3A_DDR_B_MD[7] FPGA3A_DDR_B_MD[8] 24:B5 24:B5 L8 L8 24:B5 24:B5 24:B5 24:B5 24:B5 24:B5 24:B5 FPGA3A_DDR_B_MD[9] FPGA3A_DDR_B_MD[10] FPGA3A_DDRB_MDQS[1] FPGA3A_DDRB_MDQSB[1] FPGA3A_DDR_B_MD[11] FPGA3A_DDR_B_MD[12] FPGA3A_DDR_B_MD[13] FPGA3A_DDR_B_MD[14] FPGA3A_DDR_B_MD[15] 24:B5 24:B5 L8 L8 24:B5 24:B5 24:B5 24:B5 24:B5 DGND +R75V_DDR3_FPGA3A +1R5V_FPGA3A IC8400 R8512 100 R8509 4.7k ETC9704 DGND BANK-34(HP) U4 IO_0_VRN_34 U6 IO_L1P_T0_34 U5 IO_L1N_T0_34 U2 IO_L2P_T0_34 U1 IO_L2N_T0_34 W6 IO_L3P_T0_DQS_34 W5 IO_L3N_T0_DQS_34 V3 IO_L4P_T0_34 W3 IO_L4N_T0_34 U7 IO_L5P_T0_34 V6 IO_L5N_T0_34 V4 IO_L6P_T0_34 W4 IO_L6N_T0_VREF_34 Y3 IO_L7P_T1_34 Y2 IO_L7N_T1_34 V2 IO_L8P_T1_34 V1 IO_L8N_T1_34 AB1 IO_L9P_T1_DQS_34 AC1 IO_L9N_T1_DQS_34 W1 IO_L10P_T1_34 Y1 IO_L10N_T1_34 AB2 IO_L11P_T1_SRCC_34 AC2 IO_L11N_T1_SRCC_34 AA3 IO_L12P_T1_MRCC_34 AA2 IO_L12N_T1_MRCC_34 AA4 IO_L13P_T2_MRCC_34 AB4 IO_L13N_T2_MRCC_34 AC4 IO_L14P_T2_SRCC_34 AC3 IO_L14N_T2_SRCC_34 AA5 IO_L15P_T2_DQS_34 AB5 IO_L15N_T2_DQS_34 AB6 IO_L16P_T2_34 AC6 IO_L16N_T2_34 Y6 IO_L17P_T2_34 Y5 IO_L17N_T2_34 AD6 IO_L18P_T2_34 AD5 IO_L18N_T2_34 AD4 IO_L19P_T3_34 AD3 IO_L19N_T3_VREF_34 AD1 IO_L20P_T3_34 AE1 IO_L20N_T3_34 AF5 IO_L21P_T3_DQS_34 AF4 IO_L21N_T3_DQS_34 AE3 IO_L22P_T3_34 AE2 IO_L22N_T3_34 AE6 IO_L23P_T3_34 AE5 IO_L23N_T3_34 AF3 IO_L24P_T3_34 AF2 IO_L24N_T3_34 T7 IO_25_VRP_34 C8502 0.1u 16V C8500 0.1u 16V R8513 100 DGND F G H I J CLK_DCLK_F3 TCK_F3AB TMS_F3AB TDO_F3A TDI_F3A NSTATUS_F3 NCONFIG_F3 15:J4 N10 N10 26:G2 N10 15:J4 15:J4 INIT_DONE_F3 15:P3 +3R3V_FPGA3A 4.7k 4.7k R8501 R8503 R8500 33 R8539 33 R8502 330 C8503 0.1u 16V +1R8V_FPGA3A IC8400 BANK-0(CONFIG) R11 DXN_0 M12 VCCADC_0 M11 GNDADC_0 R12 DXP_0 N11 VREFN_0 P12 VREFP_0 N12 VP_0 P11 VN_0 E8 VCCBATT_0 C8 CCLK_0 L8 TCK_0 N8 TMS_0 R7 TDO_0 R6 TDI_0 G7 INIT_B_0 P6 PROGRAM_B_0 P7 CFGBVS_0 J7 DONE_0 P5 M2_0 T5 M0_0 T2 M1_0 DGND IC8400 BANK-115(GTX) H2 MGTXTXP3_115 H1 MGTXTXN3_115 J4 MGTXRXP3_115 J3 MGTXRXN3_115 K2 MGTXTXP2_115 K1 MGTXTXN2_115 L4 MGTXRXP2_115 L3 MGTXRXN2_115 M2 MGTXTXP1_115 M1 MGTXTXN1_115 N4 MGTXRXP1_115 N3 MGTXRXN1_115 P2 MGTXTXP0_115 P1 MGTXTXN0_115 R4 MGTXRXP0_115 R3 MGTXRXN0_115 H6 MGTREFCLK0P_115 H5 MGTREFCLK0N_115 M6 MGTRREF_115 M5 MGTAVTTRCAL_115 K6 MGTREFCLK1P_115 K5 MGTREFCLK1N_115 DGND IC8400 BANK-116(GTX) A4 MGTXTXP3_116 A3 MGTXTXN3_116 B6 MGTXRXP3_116 B5 MGTXRXN3_116 B2 MGTXTXP2_116 B1 MGTXTXN2_116 C4 MGTXRXP2_116 C3 MGTXRXN2_116 D2 MGTXTXP1_116 D1 MGTXTXN1_116 E4 MGTXRXP1_116 E3 MGTXRXN1_116 F2 MGTXTXP0_116 F1 MGTXTXN0_116 G4 MGTXRXP0_116 G3 MGTXRXN0_116 D6 MGTREFCLK0P_116 D5 MGTREFCLK0N_116 F6 MGTREFCLK1P_116 F5 MGTREFCLK1N_116 DGND K L M N +1R5V_FPGA3A C8501 0.1u 16V VCC INB 1 5 INA CLK_72M_SUBCLK_F3A 15:K2 2 3 4 OUTY GND DGND IC8501 C0JBAA000511 DGND R8525 - 33 B4 SUBCLK_72M_SYS_F3A +3R3V_D_3 C8504 0.1u 16V 1k R8534 1k R8535 - - X8500 1 VCONT 6 VCC 2 OE 5 OUT_N 3 GND 4 OUT DGND DGND B4 CLK_133M_F3A_N B4 CLK_133M_F3A_P FPGA3A_DDR_MA[12-0] B2/B3 [8] [7] [2] [3] [12] [6] [5] [4] [1] [10] [0] [9] [11] R8514 24:E3/24:J3 EXBN8VR000X [8] [7] [2] [3] R8515 EXBN8VR000X [12] [6] [5] [4] R8516 EXBN8VR000X [1] [10] [0] [9] R8517 0 [11] FPGA3A_DDR_AB_MA[12-0] B4 FPGA3A_DDR_MCKE B4 FPGA3A_DDR_MODT B3 FPGA3A_DDR_MWRB B3 FPGA3A_DDR_MCSB B3 FPGA3A_DDR_MBA[0] B3 FPGA3A_DDR_MRASB B3 FPGA3A_DDR_MBA[1] B3 FPGA3A_DDR_MCASB B3 FPGA3A_DDR_MBA[2] B8 FPGA3A_DDR_MRST_N B7 FPGA3A_DDRA_MDQS[0] B7 FPGA3A_DDRA_MDQSB[0] B8 FPGA3A_DDRA_MDQS[1] B8 FPGA3A_DDRA_MDQSB[1] FPGA3A_DDRB_MDQS[0] FPGA3A_DDRB_MDQSB[0] FPGA3A_DDRB_MDQS[1] FPGA3A_DDRB_MDQSB[1] B9 B9 B10 B10 R8518 EXBN8VR000X 24:D2/24:I2 24:D3/24:I3 24:D2/24:I2 24:D2/24:I2 R8540 EXBN8VR000X 24:E3/24:I3 24:D2/24:I2 24:E3/24:I3 24:D2/24:I2 FPGA3A_DDR_AB_MCKE FPGA3A_DDR_AB_MODT FPGA3A_DDR_AB_MWRB FPGA3A_DDR_AB_MCSB FPGA3A_DDR_AB_MBA[0] FPGA3A_DDR_AB_MRASB FPGA3A_DDR_AB_MBA[1] FPGA3A_DDR_AB_MCASB R8523 0 24:E3/24:I3 FPGA3A_DDR_AB_MBA[2] R8524 0 24:D2/24:I2 FPGA3A_DDR_AB_MRST_N R8541 - 10 R8542 - 10 R8543 - 10 R8544 - 10 24:F4 FPGA3A_DDR_A_MDQS[0] 24:F4 FPGA3A_DDR_A_MDQSB[0] 24:F3 FPGA3A_DDR_A_MDQS[1] 24:F3 FPGA3A_DDR_A_MDQSB[1] R8545 - 10 R8546 - 10 R8547 - 10 R8548 - 10 24:K4 FPGA3A_DDR_B_MDQS[0] 24:K4 FPGA3A_DDR_B_MDQSB[0] 24:K3 FPGA3A_DDR_B_MDQS[1] 24:K3 FPGA3A_DDR_B_MDQSB[1] JTAG +3R3V_FPGA3A +3R3V_FPGA3A C8505 0.1u 16V 1 2 3 4 5 6 7 8 9 10 SMT STRAIGHT K1KA10AA0051 CN8500 DGND R8504 4.7k R8505 4.7k R8506 4.7k R8507 4.7k F2/26:G2 TCK_F3AB 26:G2 TDO_F3B F3 TDI_F3A F2/26:G2 TMS_F3AB O P Q IC8400 U21 NC U22 NC V22 NC U24 NC U25 NC V23 NC V24 NC U26 NC V26 NC W25 NC W26 NC V21 NC W21 NC AA25 NC AB25 NC W23 NC W24 NC AB26 NC AC26 NC Y25 NC Y26 NC AA23 NC AB24 NC Y23 NC AA24 NC NC-1 Y20 NC AF22 NC AE22 NC AE25 NC AD25 NC AF23 NC AE23 NC AE26 NC AD26 NC AF25 NC AF24 NC AE21 NC AD21 NC AC21 NC AB21 NC AC22 NC AB22 NC AD24 NC AD23 NC Y21 NC W20 NC AC24 NC AC23 NC AA22 NC Y22 NC IC8400 V13 NC AE17 NC AF17 NC AF14 NC AF15 NC AE18 NC AF18 NC AD15 NC AE15 NC AF19 NC AF20 NC AD16 NC AE16 NC AA14 NC AA15 NC AC14 NC AD14 NC Y15 NC Y16 NC AB14 NC AB15 NC AA17 NC AA18 NC AB16 NC AC16 NC NC-2 W13 NC W14 NC V14 NC V19 NC V18 NC W16 NC W15 NC W19 NC W18 NC V17 NC V16 NC Y18 NC Y17 NC AB20 NC AB19 NC AD19 NC AC19 NC AA20 NC AA19 NC AE20 NC AD20 NC AC17 NC AB17 NC AD18 NC AC18 NC FPGA3A Bank 0,32,33,115,116 Ref No.8500 8599 Series CIRCUIT NAME MODEL LCD_MAIN (22/32) BT-4LH310 PAGE No. DIA - 26