Panasonic BT-4LH310 Parts List - Page 92
Ref No9500, Series, FPGA3B Bank 13
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1 2 3 4 5 A B D_LCDE_LVDS_OUT2+ D_LCDE_LVDS_OUT2D_LCDE_LVDS_OUT0+ D_LCDE_LVDS_OUT0D_LCDF_LVDS_OUT0+ D_LCDF_LVDS_OUT0D_LCDE_LVDS_OUT4+ D_LCDE_LVDS_OUT4D_LCDE_LVDS_OUT1+ D_LCDE_LVDS_OUT1D_LCDE_LVDS_OUT3+ D_LCDE_LVDS_OUT3D_LCDF_LVDS_OUT3+ D_LCDF_LVDS_OUT3D_LCDF_LVDS_OUT1+ D_LCDF_LVDS_OUT1D_LCDF_LVDS_OUT2+ D_LCDF_LVDS_OUT2D_LCDF_LVDS_OUT4+ D_LCDF_LVDS_OUT4CLK_LCDF_LVDS_OUT+ CLK_LCDF_LVDS_OUTCLK_LCDE_LVDS_OUT+ CLK_LCDE_LVDS_OUTCLK_LCDG_LVDS_OUT+ CLK_LCDG_LVDS_OUTCLK_LCDH_LVDS_OUT+ CLK_LCDH_LVDS_OUTD_LCDH_LVDS_OUT4+ D_LCDH_LVDS_OUT4D_LCDH_LVDS_OUT2+ D_LCDH_LVDS_OUT2D_LCDH_LVDS_OUT3+ D_LCDH_LVDS_OUT3D_LCDG_LVDS_OUT3+ D_LCDG_LVDS_OUT3D_LCDH_LVDS_OUT1+ D_LCDH_LVDS_OUT1D_LCDG_LVDS_OUT0+ D_LCDG_LVDS_OUT0D_LCDG_LVDS_OUT1+ D_LCDG_LVDS_OUT1D_LCDG_LVDS_OUT4+ D_LCDG_LVDS_OUT4D_LCDG_LVDS_OUT2+ D_LCDG_LVDS_OUT2D_LCDH_LVDS_OUT0+ D_LCDH_LVDS_OUT0- 29:N4 29:N4 29:N3 29:N3 29:N5 29:N5 29:N4 29:N4 29:N3 29:N3 29:N4 29:N4 29:N6 29:N6 29:N5 29:N5 29:N6 29:N6 29:N6 29:N6 29:N6 29:N6 29:N4 29:N4 29:N12 29:N11 29:N14 29:N13 29:N14 29:N14 29:N13 29:N13 29:N14 29:N14 29:N12 29:N12 29:N13 29:N13 29:N11 29:N11 29:N11 29:N11 29:N12 29:N12 29:N11 29:N11 29:N13 29:N13 C D E F G IC9500 BANK-13(HR) N16 IO_0_13 K25 IO_L1P_T0_13 K26 IO_L1N_T0_13 R26 IO_L2P_T0_13 P26 IO_L2N_T0_13 M25 IO_L3P_T0_DQS_13 L25 IO_L3N_T0_DQS_13 P24 IO_L4P_T0_13 N24 IO_L4N_T0_13 N26 IO_L5P_T0_13 M26 IO_L5N_T0_13 R25 IO_L6P_T0_13 P25 IO_L6N_T0_VREF_13 N19 IO_L7P_T1_13 M20 IO_L7N_T1_13 M24 IO_L8P_T1_13 L24 IO_L8N_T1_13 P19 IO_L9P_T1_DQS_13 P20 IO_L9N_T1_DQS_13 M21 IO_L10P_T1_13 M22 IO_L10N_T1_13 P23 IO_L11P_T1_SRCC_13 N23 IO_L11N_T1_SRCC_13 N21 IO_L12P_T1_MRCC_13 N22 IO_L12N_T1_MRCC_13 R21 IO_L13P_T2_MRCC_13 P21 IO_L13N_T2_MRCC_13 R22 IO_L14P_T2_SRCC_13 R23 IO_L14N_T2_SRCC_13 T24 IO_L15P_T2_DQS_13 T25 IO_L15N_T2_DQS_13 T20 IO_L16P_T2_13 R20 IO_L16N_T2_13 T22 IO_L17P_T2_13 T23 IO_L17N_T2_13 U19 IO_L18P_T2_13 U20 IO_L18N_T2_13 T18 IO_L19P_T3_13 T19 IO_L19N_T3_VREF_13 P16 IO_L20P_T3_13 N17 IO_L20N_T3_13 R16 IO_L21P_T3_DQS_13 R17 IO_L21N_T3_DQS_13 N18 IO_L22P_T3_13 M19 IO_L22N_T3_13 U17 IO_L23P_T3_13 T17 IO_L23N_T3_13 R18 IO_L24P_T3_13 P18 IO_L24N_T3_13 U16 IO_25_13 D_SCX2_C_O1P D_SCX2_C_O1N D_SCX2_C_E1P D_SCX2_C_E1N D_SCX2_C_E3P D_SCX2_C_E3N D_SCX2_C_O0P D_SCX2_C_O0N D_SCX2_C_O2P D_SCX2_C_O2N D_SCX2_C_O3P D_SCX2_C_O3N D_SCX2_D_O1P D_SCX2_D_O1N D_SCX2_D_E3P D_SCX2_D_E3N D_SCX2_D_O3P D_SCX2_D_O3N D_SCX2_D_E1P D_SCX2_D_E1N CLK_SCX2_C_OCP CLK_SCX2_C_OCN CLK_SCX2_D_OCP CLK_SCX2_D_OCN CLK_SCX2_D_ECP CLK_SCX2_D_ECN CLK_SCX2_C_ECP CLK_SCX2_C_ECN D_SCX2_C_E4P D_SCX2_C_E4N D_SCX2_C_E0P D_SCX2_C_E0N D_SCX2_C_E2P D_SCX2_C_E2N D_SCX2_D_O4P D_SCX2_D_O4N D_SCX2_D_O2P D_SCX2_D_O2N D_SCX2_C_O4P D_SCX2_C_O4N D_SCX2_D_O0P D_SCX2_D_O0N D_SCX2_D_E0P D_SCX2_D_E0N D_SCX2_D_E4P D_SCX2_D_E4N D_SCX2_D_E2P D_SCX2_D_E2N 17:L3/P4 17:L3/P4 17:L2/P2 17:L2/P2 17:L2/P2 17:L2/P3 17:L3/P4 17:L3/P4 17:L3/P5 17:L3/P5 17:L3/P5 17:L3/P5 17:N3/P9 17:N3/P9 17:N2/P7 17:N2/P8 17:N3/P10 17:N3/P10 17:N2/P7 17:N2/P7 17:L3/P6 17:L3/P6 17:N3/P11 17:N3/P11 17:N2/P8 17:N2/P8 17:L2/P3 17:L2/P3 17:L2/P3 17:L2/P3 17:L2/P1 17:L2/P2 17:L2/P2 17:L2/P2 17:N3/P10 17:N3/P10 17:N3/P9 17:N3/P10 17:L3/P5 17:L3/P6 17:N3/P9 17:N3/P9 17:N2/P6 17:N2/P6 17:N2/P8 17:N2/P8 17:N2/P7 17:N2/P7 H 6 7 8 9 10 11 N1 CPU_DB_F3B[0-15] WRL RE_N D_DATA0_F3 FPGA3B_CS_N 15:A5 15:A5 15:J4 11:K8 CPU_DB_F3B[11] CPU_DB_F3B[4] CPU_DB_F3B[7] CPU_DB_F3B[14] CPU_DB_F3B[3] CPU_DB_F3B[5] CPU_DB_F3B[2] CPU_DB_F3B[6] CPU_DB_F3B[10] CPU_DB_F3B[13] CPU_DB_F3B[8] R9538 33 CLK_72M_BCLK_F3B 15:L2 RST_SYS_F3_N 15:J4 CPU_DB_F3B[12] R9500 33 CLK_74M_FPGA3B_OUT 21:B9 CPU_DB_F3B[1] CPU_DB_F3B[0] R9503 33 CPU_DB_F3B[15] CPU_DB_F3B[9] VD_FPGA3B_OUT 21:B10 R9502 - 1k R9541 - 1k C9500 1000p 50V R9501 - 1k R9536 0 IC9500 BANK-14(HR) K21 IO_0_14 B24 IO_L1P_T0_D00_MOSI_14 A25 IO_L1N_T0_D01_DIN_14 B22 IO_L2P_T0_D02_14 A22 IO_L2N_T0_D03_14 B25 IO_L3P_T0_DQS_PUDC_B_14 B26 IO_L3N_T0_DQS_EMCCLK_14 A23 IO_L4P_T0_D04_14 A24 IO_L4N_T0_D05_14 D26 IO_L5P_T0_D06_14 C26 IO_L5N_T0_D07_14 C23 IO_L6P_T0_FCS_B_14 C24 IO_L6N_T0_D08_VREF_14 D21 IO_L7P_T1_D09_14 C22 IO_L7N_T1_D10_14 B20 IO_L8P_T1_D11_14 A20 IO_L8N_T1_D12_14 E21 IO_L9P_T1_DQS_14 E22 IO_L9N_T1_DQS_D13_14 C21 IO_L10P_T1_D14_14 B21 IO_L10N_T1_D15_14 D23 IO_L11P_T1_SRCC_14 D24 IO_L11N_T1_SRCC_14 F22 IO_L12P_T1_MRCC_14 E23 IO_L12N_T1_MRCC_14 G22 IO_L13P_T2_MRCC_14 F23 IO_L13N_T2_MRCC_14 G24 IO_L14P_T2_SRCC_14 F24 IO_L14N_T2_SRCC_14 E25 IO_L15P_T2_DQS_RDWR_B_14 D25 IO_L15N_T2_DQS_DOUT_CSO_B_14 G25 IO_L16P_T2_CSI_B_14 G26 IO_L16N_T2_A15_D31_14 F25 IO_L17P_T2_A14_D30_14 E26 IO_L17N_T2_A13_D29_14 J26 IO_L18P_T2_A12_D28_14 H26 IO_L18N_T2_A11_D27_14 H21 IO_L19P_T3_A10_D26_14 G21 IO_L19N_T3_A09_D25_VREF_14 H23 IO_L20P_T3_A08_D24_14 H24 IO_L20N_T3_A07_D23_14 J21 IO_L21P_T3_DQS_14 H22 IO_L21N_T3_DQS_A06_D22_14 J24 IO_L22P_T3_A05_D21_14 J25 IO_L22N_T3_A04_D20_14 L22 IO_L23P_T3_A03_D19_14 K22 IO_L23N_T3_A02_D18_14 K23 IO_L24P_T3_A01_D17_14 J23 IO_L24N_T3_A00_D16_14 L23 IO_25_14 DGND PANEL_TEST_F3B1 PANEL_TEST_F3B2 PANEL_TEST_F3B3 PANEL_TEST_F3B4 PANEL_TEST_F3B5 PANEL_TEST_F3B6 PANEL_TEST_F3B7 PANEL_TEST_F3B8 29:S2 29:S2 29:S2 29:S2 29:S2 29:S3 29:S3 29:S3 N3 CPU_ADR_F3B[1-16] CPU_ADR_F3B[3] CPU_ADR_F3B[10] CPU_ADR_F3B[9] CPU_ADR_F3B[16] CPU_ADR_F3B[5] CPU_ADR_F3B[14] CPU_ADR_F3B[8] CPU_ADR_F3B[2] CPU_ADR_F3B[12] CPU_ADR_F3B[11] CPU_ADR_F3B[1] CPU_ADR_F3B[7] CPU_ADR_F3B[6] CPU_ADR_F3B[4] CPU_ADR_F3B[13] CPU_ADR_F3B[15] 12 I J K L M N O P Q IC9500 BANK-15(HR) K15 IO_0_15 C16 IO_L1P_T0_AD0P_15 B16 IO_L1N_T0_AD0N_15 A18 IO_L2P_T0_AD8P_15 A19 IO_L2N_T0_AD8N_15 B17 IO_L3P_T0_DQS_AD1P_15 A17 IO_L3N_T0_DQS_AD1N_15 C19 IO_L4P_T0_AD9P_15 B19 IO_L4N_T0_AD9N_15 C17 IO_L5P_T0_AD2P_15 C18 IO_L5N_T0_AD2N_15 D15 IO_L6P_T0_15 D16 IO_L6N_T0_VREF_15 H16 IO_L7P_T1_AD10P_15 G16 IO_L7N_T1_AD10N_15 G15 IO_L8P_T1_AD3P_15 F15 IO_L8N_T1_AD3N_15 J15 IO_L9P_T1_DQS_AD11P_15 J16 IO_L9N_T1_DQS_AD11N_15 E15 IO_L10P_T1_AD4P_15 E16 IO_L10N_T1_AD4N_15 G17 IO_L11P_T1_SRCC_AD12P_15 F18 IO_L11N_T1_SRCC_AD12N_15 F17 IO_L12P_T1_MRCC_AD5P_15 E17 IO_L12N_T1_MRCC_AD5N_15 E18 IO_L13P_T2_MRCC_15 D18 IO_L13N_T2_MRCC_15 H17 IO_L14P_T2_SRCC_15 H18 IO_L14N_T2_SRCC_15 D19 IO_L15P_T2_DQS_15 D20 IO_L15N_T2_DQS_ADV_B_15 G19 IO_L16P_T2_A28_15 F20 IO_L16N_T2_A27_15 F19 IO_L17P_T2_A26_15 E20 IO_L17N_T2_A25_15 H19 IO_L18P_T2_A24_15 G20 IO_L18N_T2_A23_15 K20 IO_L19P_T3_A22_15 J20 IO_L19N_T3_A21_VREF_15 J18 IO_L20P_T3_A20_15 J19 IO_L20N_T3_A19_15 L19 IO_L21P_T3_DQS_15 L20 IO_L21N_T3_DQS_A18_15 K16 IO_L22P_T3_A17_15 K17 IO_L22N_T3_A16_15 M17 IO_L23P_T3_FOE_B_15 L18 IO_L23N_T3_FWE_B_15 L17 IO_L24P_T3_RS1_15 K18 IO_L24N_T3_RS0_15 M16 IO_25_15 IC9500 R9539 - 1k R9540 - 1k DGND CL9508 CL9509 CL9510 CL9511 CL9500 CL9501 CL9502 CL9503 CL9504 CL9505 CL9506 CL9507 BANK-16(HR) J8 IO_0_16 H9 IO_L1P_T0_16 H8 IO_L1N_T0_16 G10 IO_L2P_T0_16 G9 IO_L2N_T0_16 J13 IO_L3P_T0_DQS_16 H13 IO_L3N_T0_DQS_16 J11 IO_L4P_T0_16 J10 IO_L4N_T0_16 H14 IO_L5P_T0_16 G14 IO_L5N_T0_16 H12 IO_L6P_T0_16 H11 IO_L6N_T0_VREF_16 F9 IO_L7P_T1_16 F8 IO_L7N_T1_16 D9 IO_L8P_T1_16 D8 IO_L8N_T1_16 A9 IO_L9P_T1_DQS_16 A8 IO_L9N_T1_DQS_16 C9 IO_L10P_T1_16 B9 IO_L10N_T1_16 G11 IO_L11P_T1_SRCC_16 F10 IO_L11N_T1_SRCC_16 E10 IO_L12P_T1_MRCC_16 D10 IO_L12N_T1_MRCC_16 C12 IO_L13P_T2_MRCC_16 C11 IO_L13N_T2_MRCC_16 E11 IO_L14P_T2_SRCC_16 D11 IO_L14N_T2_SRCC_16 F14 IO_L15P_T2_DQS_16 F13 IO_L15N_T2_DQS_16 G12 IO_L16P_T2_16 F12 IO_L16N_T2_16 D14 IO_L17P_T2_16 D13 IO_L17N_T2_16 E13 IO_L18P_T2_16 E12 IO_L18N_T2_16 C14 IO_L19P_T3_16 C13 IO_L19N_T3_VREF_16 B12 IO_L20P_T3_16 B11 IO_L20N_T3_16 B14 IO_L21P_T3_DQS_16 A14 IO_L21N_T3_DQS_16 B10 IO_L22P_T3_16 A10 IO_L22N_T3_16 B15 IO_L23P_T3_16 A15 IO_L23N_T3_16 A13 IO_L24P_T3_16 A12 IO_L24N_T3_16 J14 IO_25_16 CPU_DB_B[0-15] 7:G8/9:G8/11:P5/15:A7/19:D4/21:K1 CPU_DB_B[0] CPU_DB_B[9] CPU_DB_B[1] CPU_DB_B[15] R9528 EXBN8V220JX CPU_DB_F3B[0] CPU_DB_F3B[9] CPU_DB_F3B[1] CPU_DB_F3B[15] CPU_DB_B[4] CPU_DB_B[5] CPU_DB_B[2] CPU_DB_B[3] R9529 EXBN8V220JX CPU_DB_F3B[4] CPU_DB_F3B[5] CPU_DB_F3B[2] CPU_DB_F3B[3] CPU_DB_B[10] CPU_DB_B[7] CPU_DB_B[14] CPU_DB_B[6] R9530 EXBN8V220JX CPU_DB_F3B[10] CPU_DB_F3B[7] CPU_DB_F3B[14] CPU_DB_F3B[6] CPU_DB_B[8] CPU_DB_B[13] CPU_DB_B[12] CPU_DB_B[11] R9531 EXBN8V220JX CPU_DB_F3B[8] CPU_DB_F3B[13] CPU_DB_F3B[12] CPU_DB_F3B[11] B7 CPU_DB_F3B[0-15] CPU_ADR_B[1-16] 7:G10/15:A9 CPU_ADR_B[11] CPU_ADR_B[6] CPU_ADR_B[4] CPU_ADR_B[5] CPU_ADR_B[3] CPU_ADR_B[10] CPU_ADR_B[9] CPU_ADR_B[16] CPU_ADR_B[1] CPU_ADR_B[7] CPU_ADR_B[2] CPU_ADR_B[8] CPU_ADR_B[15] CPU_ADR_B[14] CPU_ADR_B[13] CPU_ADR_B[12] R9532 EXBN8V220JX CPU_ADR_F3B[11] CPU_ADR_F3B[6] CPU_ADR_F3B[4] CPU_ADR_F3B[5] R9533 EXBN8V220JX CPU_ADR_F3B[3] CPU_ADR_F3B[10] CPU_ADR_F3B[9] CPU_ADR_F3B[16] R9534 EXBN8V220JX CPU_ADR_F3B[1] CPU_ADR_F3B[7] CPU_ADR_F3B[2] CPU_ADR_F3B[8] R9535 EXBN8V220JX CPU_ADR_F3B[15] CPU_ADR_F3B[14] CPU_ADR_F3B[13] CPU_ADR_F3B[12] G9 CPU_ADR_F3B[1-16] D_SCX2_C_E0P 17:L2/P1 D_SCX2_C_E0N D_SCX2_C_E1P 17:L2/P2 17:L2/P2 D_SCX2_C_E1N D_SCX2_C_E2P 17:L2/P2 17:L2/P2 D_SCX2_C_E2N D_SCX2_C_E3P 17:L2/P2 17:L2/P2 D_SCX2_C_E3N D_SCX2_C_E4P 17:L2/P3 17:L2/P3 D_SCX2_C_E4N CLK_SCX2_C_ECP 17:L2/P3 17:L2/P3 CLK_SCX2_C_ECN 17:L2/P3 D_SCX2_C_O0P 17:L3/P4 D_SCX2_C_O0N D_SCX2_C_O1P 17:L3/P4 17:L3/P4 D_SCX2_C_O1N D_SCX2_C_O2P 17:L3/P4 17:L3/P5 D_SCX2_C_O2N D_SCX2_C_O3P 17:L3/P5 17:L3/P5 D_SCX2_C_O3N D_SCX2_C_O4P 17:L3/P5 17:L3/P5 D_SCX2_C_O4N CLK_SCX2_C_OCP 17:L3/P6 17:L3/P6 CLK_SCX2_C_OCN 17:L3/P6 D_SCX2_D_E0P 17:N2/P6 D_SCX2_D_E0N D_SCX2_D_E1P 17:N2/P6 17:N2/P7 D_SCX2_D_E1N D_SCX2_D_E2P 17:N2/P7 17:N2/P7 D_SCX2_D_E2N D_SCX2_D_E3P 17:N2/P7 17:N2/P7 D_SCX2_D_E3N D_SCX2_D_E4P 17:N2/P8 17:N2/P8 D_SCX2_D_E4N CLK_SCX2_D_ECP 17:N2/P8 17:N2/P8 CLK_SCX2_D_ECN 17:N2/P8 D_SCX2_D_O0P 17:N3/P9 D_SCX2_D_O0N D_SCX2_D_O1P 17:N3/P9 17:N3/P9 D_SCX2_D_O1N D_SCX2_D_O2P 17:N3/P9 17:N3/P9 D_SCX2_D_O2N D_SCX2_D_O3P 17:N3/P10 17:N3/P10 D_SCX2_D_O3N D_SCX2_D_O4P 17:N3/P10 17:N3/P10 D_SCX2_D_O4N CLK_SCX2_D_OCP 17:N3/P10 17:N3/P11 CLK_SCX2_D_OCN 17:N3/P11 R9527 - 100 R9520 - 100 R9519 - 100 R9518 - 100 R9517 - 100 R9515 - 100 R9516 - 100 R9525 - 100 R9524 - 100 R9523 - 100 R9522 - 100 R9521 - 100 R9526 - 100 R9509 - 100 R9508 - 100 R9507 - 100 R9506 - 100 R9504 - 100 R9505 - 100 R9514 - 100 R9513 - 100 R9512 - 100 R9511 - 100 R9510 - 100 G4/O1 D_SCX2_C_E0P G4/O2 G2/O2 D_SCX2_C_E0N D_SCX2_C_E1P G2/O2 G4/O2 D_SCX2_C_E1N D_SCX2_C_E2P G4/O2 G2/O2 D_SCX2_C_E2N D_SCX2_C_E3P G2/O3 G4/O3 D_SCX2_C_E3N D_SCX2_C_E4P G4/O3 G4/O3 D_SCX2_C_E4N CLK_SCX2_C_ECP G4/O3 CLK_SCX2_C_ECN G2/O4 D_SCX2_C_O0P G2/O4 G2/O4 D_SCX2_C_O0N D_SCX2_C_O1P G2/O4 G2/O5 D_SCX2_C_O1N D_SCX2_C_O2P G2/O5 G2/O5 D_SCX2_C_O2N D_SCX2_C_O3P G2/O5 G5/O5 D_SCX2_C_O3N D_SCX2_C_O4P G5/O6 G3/O6 D_SCX2_C_O4N CLK_SCX2_C_OCP G3/O6 CLK_SCX2_C_OCN G5/O6 D_SCX2_D_E0P G5/O6 G3/O7 D_SCX2_D_E0N D_SCX2_D_E1P G3/O7 G5/O7 D_SCX2_D_E1N D_SCX2_D_E2P G5/O7 G3/O7 D_SCX2_D_E2N D_SCX2_D_E3P G3/O8 G5/O8 D_SCX2_D_E3N D_SCX2_D_E4P G5/O8 G4/O8 D_SCX2_D_E4N CLK_SCX2_D_ECP G4/O8 CLK_SCX2_D_ECN G5/O9 D_SCX2_D_O0P G5/O9 G3/O9 D_SCX2_D_O0N D_SCX2_D_O1P G3/O9 G4/O9 D_SCX2_D_O1N D_SCX2_D_O2P G5/O10 G3/O10 D_SCX2_D_O2N D_SCX2_D_O3P G3/O10 G4/O10 D_SCX2_D_O3N D_SCX2_D_O4P G4/O10 G3/O11 D_SCX2_D_O4N CLK_SCX2_D_OCP G3/O11 CLK_SCX2_D_OCN FPGA3B Bank 13,14,15,16 Ref No9500 9599 Series CIRCUIT NAME MODEL LCD_MAIN (25/32) BT-4LH310 PAGE No. DIA - 29