Toshiba Portege R500 Maintenance Manual - Page 69

2.4 System Board Troubleshooting 2 Troubleshooting Procedures Table 2-5 Debug port (Boot mode) error status (5/10) D port status F106H Inspection items Details PIT test (Cold boot only) and initialization Setting of test pattern to channel 0 of PIT#0 Check whether the set test pattern can be read Initialization of PIT channel 0 (Setting of timer interruption interval to 55ms) Initialization of PIT channel 2 (Setting of the sound generator frequency to 664Hz) Test of PIT channel 1 (Check whether the refresh signal works normally in 30 micro-s refresh interval) HLT, when the time is out Test of PIT channel 2 (Check whether the speaker gate works normally) F107H Initialization of devices which need initialization before PCI bus CPU clock measurement initialization Check of parameter block A Permission of SMI except auto-off function Control of excess of rated input power Battery discharging current control (1CmA) AC adapter rated over current control Dividing procedures for time measuring by IRT Setting for clock generator CPU Initialization Judgment of CPU type Check of supporting Geyserville Make CPU clock High Graphics Aperture Size setup Saving memory configuration to buffer Reading of EC version Update of flash ROM type Judging of destination (Japan or other than Japan) based on DMI data CMOS default setting check Sets default setting if bad battery or bad checksum (ROM, CMOS) is detected ACPI table initialization (for execution of option ROM) PORTEGE R500 Maintenance Manual (960-634) [CONFIDENTIAL] 2-23