Intel S1200RP Technical Product Specification - Page 79

Glossary

Page 79 highlights

Glossary Intel® Server System R1000RP Family TPS Term ACPI AP APIC ASIC ASMI BIOS BIST BMC Bridge BSP Byte CBC CEK CHAP CMOS DPC EEPROM EHCI EMP EPS ESB2-E FBD FMB FRB FRU FSB GB GPIO GTL HSC Hz I2C IA IBF ICH ICMB IERR IFB INTR Glossary Definition Advanced Configuration and Power Interface Application Processor Advanced Programmable Interrupt Control Application Specific Integrated Circuit Advanced Server Management Interface Basic Input/Output System Built-In Self Test Baseboard Management Controller Circuitry connecting one computer bus to another, allowing an agent on one to access the other Bootstrap Processor 8-bit quantity Chassis Bridge Controller (A microcontroller connected to one or more other CBCs, together they bridge the IPMB buses of multiple chassis.) Common Enabling Kit Challenge Handshake Authentication Protocol In terms of this specification, this describes the PC-AT compatible region of battery-backed 128 bytes of memory, which normally resides on the server board Direct Platform Control Electrically Erasable Programmable Read-Only Memory Enhanced Host Controller Interface Emergency Management Port External Product Specification Enterprise South Bridge 2 Fully Buffered DIMM Flexible Mother Board Fault Resilient Booting Field Replaceable Unit Front Side Bus 1024MB General Purpose I/O Gunning Transceiver Logic Hot-Swap Controller Hertz (1 cycle/second) Inter-Integrated Circuit Bus Intel® Architecture Input Buffer I/O Controller Hub Intelligent Chassis Management Bus Internal Error I/O and Firmware Bridge Interrupt Revision 1.2 Intel order number: G91532-003 69

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Glossary
Intel
®
Server System R1000RP Family TPS
Revision 1.2
Intel order number: G91532-003
69
Glossary
Term
Definition
ACPI
Advanced Configuration and Power Interface
AP
Application Processor
APIC
Advanced Programmable Interrupt Control
ASIC
Application Specific Integrated Circuit
ASMI
Advanced Server Management Interface
BIOS
Basic Input/Output System
BIST
Built-In Self Test
BMC
Baseboard Management Controller
Bridge
Circuitry connecting one computer bus to another, allowing an agent on one to access the other
BSP
Bootstrap Processor
Byte
8-bit quantity
CBC
Chassis Bridge Controller (A microcontroller connected to one or more other CBCs, together they
bridge the IPMB buses of multiple chassis.)
CEK
Common Enabling Kit
CHAP
Challenge Handshake Authentication Protocol
CMOS
In terms of this specification, this describes the PC-AT compatible region of battery-backed 128 bytes
of memory, which normally resides on the server board
DPC
Direct Platform Control
EEPROM
Electrically Erasable Programmable Read-Only Memory
EHCI
Enhanced Host Controller Interface
EMP
Emergency Management Port
EPS
External Product Specification
ESB2-E
Enterprise South Bridge 2
FBD
Fully Buffered DIMM
FMB
Flexible Mother Board
FRB
Fault Resilient Booting
FRU
Field Replaceable Unit
FSB
Front Side Bus
GB
1024MB
GPIO
General Purpose I/O
GTL
Gunning Transceiver Logic
HSC
Hot-Swap Controller
Hz
Hertz (1 cycle/second)
I
2
C
Inter-Integrated Circuit Bus
IA
Intel
®
Architecture
IBF
Input Buffer
ICH
I/O Controller Hub
ICMB
Intelligent Chassis Management Bus
IERR
Internal Error
IFB
I/O and Firmware Bridge
INTR
Interrupt