MSI MPG Z790 CARBON MAX WIFI User Manual - Page 52

Latency Timing Configuration tRTL/tIOL, tRTL CHB/D0/R0

Page 52 highlights

▶ +Latency Timing Configuration tRTL/tIOL ▶ Latency Timing Setting Mode Selects the latency timing mode. ▶ RTL Init Value (CHA) Sets the initial RTL value (Round Trip Latency) for memory channel A. ▶ RTL Init Value (CHB) Sets the initial RTL value (Round Trip Latency) for memory channel B. ▶ tRTL (CHA/D0/R0) Sets the round trip latency time for channel A, DIMM0, RANK0. ▶ tRTL (CHA/D0/R1) Sets the round trip latency time for channel A, DIMM0, RANK1. ▶ tRTL (CHA/D1/R0) Sets the round trip latency time for channel A, DIMM1, RANK0. ▶ tRTL (CHA/D1/R1) Sets the round trip latency time for channel A, DIMM1, RANK1. ▶ tRTL (CHB/D0/R0) Sets the round trip latency time for channel B, DIMM0, RANK0. ▶ tRTL (CHB/D0/R1) Sets the round trip latency time for channel B, DIMM0, RANK1. ▶ tRTL (CHB/D1/R0) Sets the round trip latency time for channel B, DIMM1, RANK0. ▶ tRTL (CHB/D1/R1) Sets the round trip latency time for channel B, DIMM1, RANK1. ▶ +Misc Item ▶ Safe Boot Retry Enables this item to meet the best memory compatibility while booting. ▶ DRAM Voltage Boost Sets the voltage for memory training. Higher voltage may benefit memory overclocking capability but cause system unstable. ▶ ODT Finetune (CHA) Sets the ODT (ON-die termination) value for improving the overclocking capability and stability of memory channel A. ▶ ODT Finetune (CHB) Sets the ODT (ON-die termination) value for improving the overclocking capability and stability of memory channel B. 52 BIOS Setup

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52
BIOS Setup
+Latency Timing Configuration tRTL/tIOL
Latency Timing Setting Mode
Selects the latency timing mode.
RTL Init Value (CHA)
Sets the initial RTL value (Round Trip Latency) for memory channel A.
RTL Init Value (CHB)
Sets the initial RTL value (Round Trip Latency) for memory channel B.
tRTL (CHA/D0/R0)
Sets the round trip latency time for channel A, DIMM0, RANK0.
tRTL (CHA/D0/R1)
Sets the round trip latency time for channel A, DIMM0, RANK1.
tRTL (CHA/D1/R0)
Sets the round trip latency time for channel A, DIMM1, RANK0.
tRTL (CHA/D1/R1)
Sets the round trip latency time for channel A, DIMM1, RANK1.
tRTL (CHB/D0/R0)
Sets the round trip latency time for channel B, DIMM0, RANK0.
tRTL (CHB/D0/R1)
Sets the round trip latency time for channel B, DIMM0, RANK1.
tRTL (CHB/D1/R0)
Sets the round trip latency time for channel B, DIMM1, RANK0.
tRTL (CHB/D1/R1)
Sets the round trip latency time for channel B, DIMM1, RANK1.
+Misc Item
Safe Boot Retry
Enables this item to meet the best memory compatibility while booting
.
DRAM Voltage Boost
Sets the voltage for memory training. Higher voltage may benefit memory
overclocking capability but cause system unstable.
ODT Finetune (CHA)
Sets the ODT (ON-die termination) value for improving the overclocking capability
and stability of memory channel A.
ODT Finetune (CHB)
Sets the ODT (ON-die termination) value for improving the overclocking capability
and stability of memory channel B.