MSI MPG Z790 CARBON MAX WIFI User Manual - Page 64

Control IOMMU Pre-boot Behavior, Enabled, DMA Control Guarantee, Hardware Prefetcher

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▶ Control IOMMU Pre-boot Behavior Enables or disables the IOMMU (I/O Memory Management Unit) in pre-boot environment. This item is available when the Intel VT-D sets to Enabled. ▶ DMA Control Guarantee Enables or disables the DMA (Direct Memory Access) control guarantee. This item is available when the Intel VT-D sets to Enabled. ▶ Hardware Prefetcher Enables or disables the hardware prefetcher (MLC Streamer prefetcher). [Enabled] Allows the hardware prefetcher to automatically pre-fetch data and instructions into L2 cache from memory for tuning the CPU performance. [Disabled] Disables the hardware prefetcher. ▶ Adjacent Cache Line Prefetch Enables or disables the CPU hardware prefetcher (MLC Spatial prefetcher). [Enabled] Enables adjacent cache line prefetching for reducing the cache latency time and tuning the performance to the specific application. [Disabled] Enables the requested cache line only. ▶ CPU AES Instructions Enables or disables the CPU AES (Advanced Encryption Standard-New Instructions) support. This item appears when a CPU supports this function. ▶ CFG Lock Lock or un-lock the MSR 0xE2[15], CFG lock bit. [Enabled] Locks the CFG lock bit. [Disabled] Un-locks the CFG lock bit. 64 BIOS Setup

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64
BIOS Setup
▶
Control IOMMU Pre-boot Behavior
Enables or disables the IOMMU (I/O Memory Management Unit) in pre-boot
environment. This item is available when the Intel VT-D sets to
Enabled
.
▶
DMA Control Guarantee
Enables or disables the DMA (Direct Memory Access) control guarantee. This item
is available when the Intel VT-D sets to
Enabled
.
▶
Hardware Prefetcher
Enables or disables the hardware prefetcher (MLC Streamer prefetcher).
[Enabled]
Allows the hardware prefetcher to automatically pre-fetch data
and instructions into L2 cache from memory for tuning the CPU
performance.
[Disabled]
Disables the hardware prefetcher.
▶
Adjacent Cache Line Prefetch
Enables or disables the CPU hardware prefetcher (MLC Spatial prefetcher).
[Enabled]
Enables adjacent cache line prefetching for reducing the cache
latency time and tuning the performance to the specific application.
[Disabled]
Enables the requested cache line only.
▶
CPU AES Instructions
Enables or disables the CPU AES (Advanced Encryption Standard-New
Instructions) support. This item appears when a CPU supports this function.
▶
CFG Lock
Lock or un-lock the MSR 0xE2[15], CFG lock bit.
[Enabled]
Locks the CFG lock bit.
[Disabled]
Un-locks the CFG lock bit.