Canon PC980 Service Manual - Page 221

CHAPTER 8 ADF H. Controlling the Belt Motor 1. Outline Figure 8-122 is a diagram showing the control circuit for the belt motor (M2). The belt motor is a 4-phase control stepping motor. The CPU (Q1) on the ADF controller PCB sends control pulse signals (A, A*, B, B*) to the motor driver (Q4). In response, the motor driver changes the output timing of the pulse signals (MA, MA*, MB, MB*) used for driving the motor to rotate the belt motor clockwise or counterclockwise. The motor driver is equipped with a limiter function used to keep the motor supplied with a specific current so that current greater than specified will not flow. If loads large enough to activate the limiter function occur in succession, the belt motor cannot rotate as specified, possibly leading to feeding faults. Any feeding fault will cause the ADF controller to flash the Jam indicator on the controller and stop the belt motor at the same time. Q1 A CPU A* B B* ADF controller PCB +24V MA Q4 Motor driver MA* MB MB* Belt motor M1 Figure 8-122 COPYRIGHT © 1999 CANON INC. CANON PC800s/900s REV.0 AUG. 1999 PRINTED IN JAPAN (IMPRIME AU JAPON) 8-15